HT36A2
Pin Assignment
P
P
P
P
A
A
A
A
4
5
6
7
P
A
A
A
A
3
2
1
0
4
4
4
4
4
4
4
4
4
3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
1
2
3
4
5
6
7
8
9
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
P
P
P
N
C
N
C
C
C
C
C
C
P
P
P
P
P
P
P
P
B
B
B
B
B
B
B
B
0
1
2
3
4
5
6
7
N
N
N
N
N
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
P
C
C
C
C
0
1
2
3
P
A
4
1
2
3
4
5
6
7
8
9
1
1
1
1
1
2
2
2
2
2
2
2
2
2
1
1
1
1
1
8
7
6
5
4
3
2
1
0
9
8
7
6
5
P
P
P
P
N
N
O
N
O
R
V
V
V
V
A
A
A
A
3
2
1
0
P
P
A
5
P
P
P
A
A
6
7
N
N
N
N
N
N
N
N
N
N
N
C
C
C
C
C
C
C
C
C
C
C
P
O
S
S
C
C
2
1
N
C
C
C
C
C
C
C
C
C
C
O
N
R
E
C
S
N
S
S
C
C
2
1
N
N
C
E
V
S
S
S
N
V
S
A
N
0
1
2
3
4
S
V
D
D
D
D
N
S
S
D
D
S
S
V
A
N
U
A
T
A
E
S
T
A
D
D
D
U
D
T
E
S
T
A
H
T
3
6
A
2
H
T
3
6
A
2
4
8
S
S
O
P
-
A
2
8
S
O
P
-
A
Pad Assignment
2
2
2
9
2
8
2
7
2
6
2
5
2
4
2
3
1
P
B
0
P
P
B
B
1
2
2
3
4
6
P
P
B
B
3
4
5
P
P
B
B
5
6
7
8
P
B
7
P
C
0
2
1
P
P
C
C
1
2
2
0
(
0
,
0
)
1
9
P
O
C
3
1
8
S
C
2
1
7
O
R
S
C
1
1
6
1
5
E
S
1
3
1
4
9
1
0
1
1
1
2
Chip size: 87.2 ´ 118.3 (mil)
* The IC substrate should be connected to VSS in the PCB layout artwork.
Rev. 1.00
2
June 19, 2003