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HT32F1251 参数 Datasheet PDF下载

HT32F1251图片预览
型号: HT32F1251
PDF下载: 下载PDF文件 查看货源
内容描述: 32位微控制器与ARM Cortex-M3内核 [32-bit Microcontroller with ARM Cortex-M3 Core]
分类和应用: 微控制器
文件页数/大小: 35 页 / 749 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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32-bit ARM Cortex™-M3 MCU  
HT32F1251/51B/52/53  
Features  
2
Core  
32-bit ARM® Cortex™-M3 processor core  
Up to 72 MHz operation frequency  
1.25 DMIPS/MHz (Dhrystone 2.1)  
Single-cycle multiplication and hardware division  
Integrated Nested Vectored Interrupt Controller (NVIC)  
24-bit SysTick timer  
The Cortex™-M3 processor is a general-purpose 32-bit processor core especially suitable for  
products requiring high performance and low power consumption microcontrollers. It offers many  
new features such as a Thumb-2 instruction set, hardware divider, low latency interrupt respond  
time, atomic bit-banding access and multiple buses for simultaneous accesses. The Cortex™-M3  
processor is based on the ARMv7 architecture and supports both Thumb and Thumb-2 instruction  
sets. Some system peripherals listed below are also provided by Cortex™-M3:  
Internal Bus Matrix connected with ICode bus, DCode bus, System bus, Private Peripheral Bus  
(PPB) and debug accesses (AHB-AP)  
Nested Vectored Interrupt Controller (NVIC)  
Flash Patch and Breakpoint (FPB)  
Data Watchpoint and Trace (DWT)  
Instrument Trace Macrocell (ITM)  
Memory Protection Unit (MPU)  
Serial Wire JTAG Debug Port (SWJ-DP)  
Embedded Trace Macrocell (ETM)  
Trace Port Interface Unit (TPIU)  
On-chip Memory  
9 to 32 KB on-chip Flash memory for instruction/data and option storage  
2 to 8 KB on-chip SRAM  
Supports several boot modes  
The ARM® Cortex™-M3 processor is structured in Harvard architecture which can use separate  
buses to fetch instructions and load/store data. The instruction code and data are both located in the  
same memory address space but in different address ranges. The maximum address range of the  
Cortex™-M3 is 4 GB since it has a 32-bit bus address width. Additionally, a pre-defined memory  
map is provided by the Cortex™-M3 processor to reduce the software complexity of repeated  
implementation of different device vendors. However, some regions are used by the ARM®  
Cortex™-M3 system peripherals. Refer to the ARM® Cortex™-M3 Technical Reference Manual  
for more information. The Figure 2. HT32F125x Memory Map shows the memory map of the  
HT32F125x series of devices, including Code, SRAM, peripheral, and other pre-defined regions.  
Rev. 1.00  
7 of 35  
May 27, 2011