32-Bit ARM® Cortex™-M0+ MCU
HT32F52231/HT32F52241/HT32F52331/HT32F52341
List of Figures
Figure 1. Block Diagram .......................................................................................................................... 17
Figure 2. Memory Map............................................................................................................................. 18
Figure 3. Clock Structure......................................................................................................................... 21
Figure 4. HT32F52231/52241 24-pin SSOP Pin Assignment.................................................................. 22
Figure 5. HT32F52231/52241 28-pin SSOP Pin Assignment.................................................................. 23
Figure 6. HT32F52231/52241 33-pin QFN Pin Assignment .................................................................... 24
Figure 7. HT32F52231/52241 48-pin LQFP Pin Assignment................................................................... 25
Figure 8. HT32F52331/52341 33-pin QFN Pin Assignment .................................................................... 26
Figure 9. HT32F52331/52341 48-pin LQFP Pin Assignment................................................................... 27
Figure 10. ADC Sampling Network Model ............................................................................................... 40
Figure 11. I2C Timing Diagrams............................................................................................................... 41
Figure 12. SPI Timing Diagrams – SPI Master Mode.............................................................................. 42
Figure 13. SPI Timing Diagrams – SPI Slave Mode with CPHA=1.......................................................... 43
Figure 14. USB Signal Rise Time and Fall Time and Cross-point Voltage (VCRS) Definition................. 44
Rev. 1.51
5 of 50
April 11, 2017