ꢂꢄ-bit �RM Cortex™-Mꢂ MCU
HTꢂꢄF1755/HTꢂꢄF1765/HTꢂꢄFꢄ755
List of Figures
Fiꢁꢀre 1. HTꢂꢄF1755/1765/ꢄ755 Block Diaꢁram .................................................................................. 18
Fiꢁꢀre ꢄ. HTꢂꢄF1755/1765/ꢄ755 Memory Map..................................................................................... 19
Fiꢁꢀre ꢂ. HTꢂꢄF1755/1765/ꢄ755 Clock Strꢀctꢀre................................................................................. ꢄ0
Fiꢁꢀre 4. HTꢂꢄF1755/1765/ꢄ755 48-LQFP Pin �ssiꢁnment ................................................................. ꢄ1
Fiꢁꢀre 5. HTꢂꢄF1755/1765/ꢄ755 64-LQFP Pin �ssiꢁnment ................................................................. ꢄꢄ
Fiꢁꢀre 6. HTꢂꢄF1755/1765/ꢄ755 100-LQFP Pin �ssiꢁnment ............................................................... ꢄꢂ
Fiꢁꢀre 7. �DC Samplinꢁ Network Model ............................................................................................... ꢂ4
Fiꢁꢀre 8. IꢄC Timinꢁ Diaꢁrams............................................................................................................... ꢂ6
Fiꢁꢀre 9. SPI Timinꢁ Diaꢁrams – SPI Master Mode.............................................................................. ꢂ7
Fiꢁꢀre 10. SPI Timinꢁ Diaꢁrams – SPI Slave Mode and CPH�=1........................................................ ꢂ8
Fiꢁꢀre 11. USB Siꢁnal Rise Time and Fall time and Cross-Point Voltaꢁe (VCRS) Definition................... 40
Rev. 1.00
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