½½-bit ½RM Co½tex™-M½ MCU
HT½½F1½51/51B/5½/5½
Flash Memory Controller
▀
Flash accelerator for
maximum efficiency
▀
32-bit word programming (ISP and IAP)
▀
Flash protection capability to prevent illegal access
The Flash Memory Controller, FMC, provides all the necessary functions and pre-fetch buffer for
the embedded on-chip Flash Memory. Since the access speed of the Flash Memory is slower than
the CPU, a wide access interface with a pre-fetch buffer is provided for the Flash Memory in order
to reduce the CPU waiting time which will cause CPU instruction execution delays. Flash Memory
word program/page erase functions are also provided.
Features
Reset Control Unit
▀
Supply supervisor:
●
Power On Reset (POR)
●
Brown Out Detector (BOD)
●
Programmable Low Voltage Detector (LVD)
The Reset Control Unit (RSTCU) has three kinds of reset, the power on reset, system reset and
APB unit reset. The power on reset, known as a cold reset, resets the full system during power up.
A system reset resets the processor core and peripheral IP components with the exception of the
SW-DP controller. The resets can be triggered by an external signal, internal events and the reset
generators.
Clock Control Unit
▀
External 4 to 16 MHz crystal oscillator
▀
External 32,768 Hz crystal oscillator
▀
Internal 8MHz RC oscillator trimmed to 1% accuracy at 3.3V operating voltage and 25°C oper-
ating temperature
▀
Internal 32kHz RC oscillator
▀
Integrated system clock PLL
▀
Independent clock gating bits for peripheral clock sources
The Clock Control unit, CKCU, provides a range of oscillator and clock functions. These include
a High Speed Internal RC oscillator (HSI), a High Speed External crystal oscillator (HSE), a Low
Speed Internal RC oscillator (LSI), a Low Speed External crystal oscillator (LSE), a Phase Lock
Loop (PLL), a HSE clock monitor, clock prescalers, clock multiplexers and clock gating circuitry.
The clocks of the AHB, APB and Cortex
TM
-M3 are derived from the system clock (CK_SYS)
which can come from the HSI, HSE or PLL. The Watchdog Timer and Real Time Clock (RTC) use
either the LSI or LSE as their clock source. The maximum operating frequency of the system core
clock (CK_AHB) can be up to 72MHz. (NOTE: LSE is not supported by HT32F1251B).
Rev. 1.10
8 of ½5
½½½i½ 1½½ ½01½
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
