HT27LC020
Functional Description
Operation Mode
All the operation modes are shown in the table following.
Mode
CE
VIL
OE
VIL
VIH
X
PGM
X (2)
X
A0
X
A1
X
A9
VPP
Output
Dout
Read
X
VCC
VCC
VCC
VCC
VPP
VPP
VPP
VCC
VCC
Output Disable
Standby (TTL)
Standby (CMOS)
Program
VIL
X
X
X
High Z
High Z
High Z
DIN
VIH
X
X
X
X
X
X
X
X
X
V
CC±0.3V
VIL
VIH
VIL
X
VIL
VIH
X
X
X
X
Program Verify
Product Inhibit
Manufacturer Code (3)
Device Code (3)
VIL
X
X
X
DOUT
High Z
1C
VIH
X
X
X
VIL
VIL
VIL
X
VIL
VIH
VIH
VIH
VH (1)
VH (1)
VIL
X
02
Notes:
(1) VH = 12.0V±0.5V
(2) X=Either VIH or VIL
(3) For Manufacturer Code and Device Code, A1=VIH, When A1=VIL, both codes will read 7F
Programming of the HT27LC020
12.5±0.2V, PGM Low, and OE High will program that
HT27LC020. A high-level CE input inhibits the HT27LC020
from being programmed.
When the HT27LC020 is delivered, the chip has all
2048K bits in the ²ONE², or HIGH state. ²ZEROs² are
loaded into the HT27LC020 through programming.
Program Verify Mode
The programming mode is entered when 12.5±0.2V is ap-
plied to the VPP pin, OE is at VIH, and CE and PGM are
VIL. For programming, the data to be programmed is ap-
plied with 8 bits in parallel to the data pins.
Verification should be performed on the programmed
bits to determine whether they were correctly pro-
grammed. The verification should be performed with
OE and CE at VIL, PGM at VIH, and VPP at its program-
ming voltage.
The programming flowchart in Figure 3 shows the fast
interactive programming algorithm. The interactive al-
gorithm reduces programming time by using 30ms to
105ms programming pulses and giving each address
only as many pulses as is necessary in order to reliably
program the data. After each pulse is applied to a given
address, the data in that address is verified. If the data
is not verified, additional pulses are given until it is veri-
fied or until the maximum number of pulses is reached
while sequencing through each address of the
HT27LC020. This process is repeated while sequenc-
ing through each address of the HT27LC020. This part
of the programming algorithm is done at VCC=6.0V to
assure that each EPROM bit is programmed to a suffi-
ciently high threshold voltage. This ensures that all bits
have sufficient margin. After the final address is com-
pleted, the entire EPROM memory is read at
Auto Product Identification
The Auto Product Identification mode allows the read-
ing out of a binary code from an EPROM that will identify
its manufacturer and the type. This mode is intended for
programming to automatically match the device to be
programmed with its corresponding programming algo-
rithm. This mode is functional in the 25°C±5°C ambient
temperature range that is required when programming
the HT27LC020.
To activate this mode, the programming equipment must
force 12.0±0.5V on the address line A9 of the
HT27LC020. Two identifier bytes may then be sequenced
from the device outputs by toggling address line A0 from
VIL to VIH, when A1=VIH. All other address lines must be
held at VIH during Auto Product Identification mode.
V
CC=VPP=3.3±0.3V to verify the entire memory.
Byte 0 (A0=VIL) represents the manufacturer code, and
byte 1 (A0=VIH), the device code. For HT27LC020,
these two identifier bytes are given in the Mode Select
Table. All identifiers for the manufacturer and device
codes will possess odd parity, with the MSB (DQ7) de-
fined as the parity bit. When A1=VIL, the HT27LC020
will read out the binary code of 7F, continuation code, to
signify the unavailability of manufacturer ID codes.
Program inhibit Mode
Programming of multiple HT27LC020 in parallel with dif-
ferent data is also easily accomplished by using the Pro-
gram Inhibit Mode. Except for CE, all like inputs of the
parallel HT27LC020 may be common. A TTL low-level pro-
gram pulse applied to an HT27LC020 CE input with VPP
=
Rev. 1.50
5
December 8, 2003
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
