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HT27LC020(32PLCC) 参数 Datasheet PDF下载

HT27LC020(32PLCC)图片预览
型号: HT27LC020(32PLCC)
PDF下载: 下载PDF文件 查看货源
内容描述: [OTP ROM, 256KX8, 120ns, CMOS, PQCC32]
分类和应用: OTP只读存储器
文件页数/大小: 15 页 / 145 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT27LC020  
Read Mode  
It is recommended that CE be decoded and used as the  
primary device-selection function, while OE be made a  
common connection to the READ line from the system  
control bus. This assures that all deselected memory  
devices are in their low-power standby mode and that  
the output pins are only active when data is desired from  
a particular memory device.  
The HT27LC020 has two control functions, both of  
which must be logically satisfied in order to obtain data  
at outputs. Chip Enable (CE) is the power control and  
should be used for device selection. Output Enable (OE)  
is the output control and should be used to gate data to  
the output pins, independent of device selection. As-  
suming that addresses are stable, address access time  
(tACC) is equal to the delay from CE to output (tCE). Data  
is available at the outputs (tOE) after the falling edge of  
OE, assuming the CE has been LOW and addresses  
System Considerations  
During the switch between active and standby condi-  
tions, transient current peaks are produced on the rising  
and falling edges of Chip Enable. The magnitude of  
these transient current peaks is dependent on the out-  
put capacitance loading of the device. At a minimum, a  
0.1mF ceramic capacitor (high frequency, low inherent  
inductance) should be used on each device between  
VCC and VPP to minimize transient effects. In addition,  
to overcome the voltage drop caused by the inductive  
effects of the printed circuit board traces on EPROM ar-  
rays, a 4.7mF bulk electrolytic capacitor should be used  
between VCC and VPP for each eight devices. The lo-  
cation of the capacitor should be close to where the  
power supply is connected to the array.  
have been stable for at least tACC-tOE  
.
Standby Mode  
The HT27LC020 has CMOS standby mode which re-  
duces the maximum VCC current to 10mA. It is placed in  
CMOS standby when CE is at VCC±0.3V. The  
HT27LC020 also has a TTL-standby mode which re-  
duces the maximum VCC current to 0.6mA. It is placed  
in TTL-standby when CE is at VIH. When in standby  
mode, the outputs are in a high-impedance state, inde-  
pendent of the OE input.  
Two-line Output Control Function  
To accommodate multiple memory connections, a  
two-line control function is provided to allow for:  
·
·
Low memory power dissipation  
Assurance that output bus contention will not occur  
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Figure 1. A.C. Waveforms for Read Operation  
Rev. 1.50  
6
December 8, 2003