HT25LC512
CMOS 64K´8-Bit SPI Serial OTP EPROM
Technical Document
·
·
·
Features
·
Operating voltage: 2.7V~3.6V
·
Programming voltage
-
V
PP
=12.5V±0.2V
-
V
CC
=6.0V±0.2V
·
512K-bit OTP ROM, access command compatible
·
Serial interface architecture
·
Serial Peripheral Interface (SPI) compatible - modes
0 and 3
·
CMOS and TTL compatible inputs and outputs
·
Pin assignment compatible with AT25F512
·
Commercial temperature range (0°C to +70°C)
·
8-pin SOP package
with AT25F512
·
64K´8-bit organization
·
12MHz max. clock frequency @VCC=2.7V
15MHz max. clock frequency @VCC=3.0V
General Description
The HT25LC512 is a 512K-bit OTP ROM of which func-
tion and pin assignment are compatible with AT25F512
and can directly replace the AT25F512 for cost down
purposes when the memory in the system is just read
only. There are 512K bits of memory which are orga-
nized as 65536 words of 8 bits each. The HT25LC512
uses a serial interface to sequentially access its data.
The simple serial interface facilitates hardware layout,
increase system reliability, minimize switching noise,
and reduce package size and active pin count. The de-
vice is optimized for use in many commercial and indus-
trial applications where high density, low pin count, low
voltage, and low power consumption are essential. The
device operates at clock frequencies up to 10MHZ.
The HT25LC512 is enabled through the chip select pin
(CS) and accessed via a three-wire interface consisting
of the Serial Input (SI), Serial Output (SO), and the Se-
rial Clock (SCK). The HOLD pin may be used to sus-
pend any serial communication without resetting the
serial sequence.
Block Diagram
S C K
H O L D
C lo c k
G e n e ra to r
S C L K
S I
C S
S IP O
R e g is te r
V P P
X -a d d r
S C L K
S I
C S
S ta te
C o n tro l
Y -a d d r
C E
O E
O u tp u t
M U X
ID
R e g is te r
O T P R O M
S ta tu s
R e g is te r
S C L K
C S
P IS O
R e g is te r
S O
Rev. 1.10
1
October 17, 2005
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
