HT24LC02
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Page write
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The 2K EEPROM is capable of an 8-byte page write.
A page write is initiated the same as byte write, but the
microcontroller does not send a stop condition after
the first data word is clocked in. Instead, after the
EEPROM acknowledges the receipt of the first data
word, the microcontroller can transmit up to seven
more data words. The EEPROM will respond with a
zero after each data word received. The
microcontroller must terminate the page write se-
quence with a stop condition.
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The data word address lower three (2K) bits are inter-
nally incremented following the receipt of each data
word. The higher data word address bits are not incre-
mented, retaining the memory page row location (re-
fer to Page write timing).
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·
Acknowledge polling
Acknowledge Polling Flow
Current address read
To maximise bus throughput, one technique is to allow
the master to poll for an acknowledge signal after the
start condition and the control byte for a write com-
mand have been sent. If the device is still busy imple-
menting its write cycle, then no ACK will be returned.
The master can send the next read/write command
when the ACK signal has finally been received.
·
The internal data word address counter maintains the
last address accessed during the last read or write op-
eration, incremented by one. This address stays valid
between operations as long as the chip power is main-
tained. The address roll over during read from the last
byte of the last memory page to the first byte of the first
page. The address roll over during write from the last
byte of the current page to the first byte of the same
page. Once the device address with the read/write se-
lect bit set to one is clocked in and acknowledged by
the EEPROM, the current address data word is seri-
ally clocked out. The microcontroller should respond a
No ACK (High) signal and following stop condition (re-
fer to Current read timing).
·
Write protect
The HT24LC02 has a write-protect function and pro-
gramming will then be inhibited when the WP pin is
connected to VCC. Under this mode, the HT24LC02 is
used as a serial ROM.
·
Read operations
The HT24LC02 supports three read operations,
namely, current address read, random address read
and sequential read. During read operation execution,
the read/write select bit should be set to ²1².
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Rev. 1.70
5
May 6, 2010