HT24LC04
·
·
Current address read
Acknowledge polling
To maximize bus throughput, one technique is to allow
the master to poll for an acknowledge signal after the
start condition and the control byte for a write com-
mand have been sent. If the device is still busy imple-
menting its write cycle, then no ACK will be returned.
The master can send the next read/write command
when the ACK signal has finally been received.
The internal data word address counter maintains the
last address accessed during the last read or write op-
eration, incremented by one. This address stays valid
between operations as long as the chip power is main-
tained. The address roll over during read from the last
byte of the last memory page to the first byte of the first
page. The address roll over during write from the last
byte of the current page to the first byte of the same
page. Once the device address with the read/write se-
lect bit set to one is clocked in and acknowledged by
the EEPROM, the current address data word is seri-
ally clocked out. The microcontroller should respond
with a ²no ACK² signal (high) followed by a stop condi-
tion (refer to Current read timing).
S
e
n
d
W
r
i
t
e
C
o
m
m
S
e
n
d
S
t
o
p
C
o
n
d
t
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I
n
i
t
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a
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W
r
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S
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n
d
S
t
a
r
t
·
Random read
S
e
n
d
C
o
t
r
o
l
l
B
y
Arandom read requires a dummy byte write sequence
to load in the data word address which is then clocked
in and acknowledged by the EEPROM. The
microcontroller must then generate another start con-
dition. The microcontroller now initiates a current ad-
dress read by sending a device address with the
read/write select bit high. The EEPROM acknowl-
edges the device address and serially clocks out the
data word. The microcontroller should respond with a
²no ACK² signal (high) followed by a stop condition
(refer to Random read timing).
w
i
t
h
R
/
W
=
0
N
o
(
A
C
K
=
0
)
?
Y
e
s
N
e
x
t
O
p
e
r
a
t
i
o
n
Acknowledge Polling Flow
Write protect
·
The HT24LC04 has a write-protect function and pro-
gramming will then be inhibited when the WP pin is
connected to VCC. Under this mode, the HT24LC04 is
used as a serial ROM.
·
Read operations
The HT24LC04 supports three read operations,
namely, current address read, random address read
and sequential read. During read operation execution,
the read/write select bit should be set to ²1².
D
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a
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s
D
s
A
T
A
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t
o
p
S
D
A
S
A
2
A
1
A
0
P
S
t
a
r
t
A
C
K
N
o
A
C
K
Current Read Timing
D
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a
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s
s
D
W
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D
d
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A
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T
s
s
A
s
s
S
t
o
p
A
2
A
1
A
0
S
A
S
P
S
D
A
C
K
A
C
K
A
C
K
N
o
A
C
K
S
t
a
r
t
S
t
a
r
t
Random Read Timing
Rev. 1.70
5
June 25, 2010
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
