HT23C040
A.C. Test Condition
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Output load: see figure right
Input rise and fall time: 10ns
Input pulse levels: 0.4V to 2.4V
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2
5
0
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Input and output timing reference levels:
0.8V and 2.0V (VCC=5V)
1.5V (VCC=3V)
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ꢀ
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Output Load Circuit
Functional Description
The HT23C040 has two modes, namely data read mode
and standby mode, controlled by CE/CE/OE1/OE1 and
OE/OE/NC inputs.
·
Data read mode
When both the chip enable (CE/CE/OE1/OE1) and
the output enable (OE/OE/NC) are active, the chip is
in data read mode. Otherwise, active CE/CE and inac-
tive OE/OE/NC result in deselect mode. The output
will remain in Hi-Z state.
·
Standby mode
The HT23C040 offers lower current consumption,
controlled by the chip enable input (CE/CE). When a
low/high level is applied to the CE/CE input regardless
of the output enable (OE/OE/NC) states the chip will
enter the standby mode.
Operation Truth Table
Mode
Read
CE/CE
H/L
OE/OE
A0~A18
D0~D7
Data Out
H/L
L/H
X
Valid
X
Deselect
Standby
H/L
High Z
High Z
L/H
X
Note: H=VIH, L=VIL, X=VIH or VIL
Timing Diagrams
Random Read
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Rev. 1.10
4
December 8, 2003
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
