HT16C23/HT16C23G
Pad assignment for COB
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
VLCD
VCCA2
1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
VDD
SDA
SCL
Option
VSS
COM0
COM1
COM2
COM3
COM4/SEG0
COM5/SEG1
COM6/SEG2
COM7/SEG3
SEG4
SEG5
SEG6
SEG7
2
3
4
5
6
7
8
10
11
12
13
14
15
16
17
18
19
N.C.
9
(0, 0)
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
Note: 1. The option (pad 5) must be bonded to V
DD
or floating.
2. The IC substrate should be connected to V
SS
in the PCB layout artwork.
3. VLCD (pad 68) and VCCA2 (pad 1) must be bonded together for the application at
V
DD
≤ V
LCD
or
V
LCD
≤ V
DD
.
Internal voltage adjustment (IVA)
set command
DE bit
0
0
1
1
VE bit
0
1
0
1
VLCD
(pad 68)
Input
Input
Input
Input
SEG55
(pad 67)
Null
Null
Output
Output
Note
●
VLCD support internal bias voltage.
●
Internal Voltage Adjustment is null
●
VLCD support internal bias voltage
●
VLCD support internal bias voltage
●
VLCD support internal bias voltage
4. VDD (pad2) and VCCA2 (pad 1) must be bonded together for the application at V
LCD
≤
V
DD
.
Internal voltage adjustment (IVA)
set command
DE bit
0
0
1
1
VE bit
0
1
0
1
VLCD
(pad 68)
Input
Output
Floating
Floating
SEG55
(pad 67)
Null
Null
Output
Output
Note
●
VLCD support internal bias voltage.
●
Detect the internal bias voltage
●
VDD support internal bias voltage
●
VDD support internal bias voltage
●
VDD support internal bias voltage
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
Chip size: 1843 x 2018μm
2
Rev. 1.10
3
June 21, 2011
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
