HT16x2Tx/HT12x2Tx
2
16
/2
12
RF Encoder
Functional Description
The devices will execute a 4-word transmission cycle upon receipt of a transmission enable signal,
which is a low signal on DX. The transmission cycle will repeat itself as long as the transmission
enable, DX is held low. Once the transmission enable returns to a high level, the encoder output
completes its final cycle and then stops as
shown below.
A/Dx
< 1 word
Encoder
DOUT
4 words
Transmitted
Continuously
4 words
An information word consists of 4 periods as illustrated below:
1/3 bit sync. period
pilot period (12 bits)
address code period
data code
period
Composition of Information
Address/Data Waveform
Each programmable address/data pin can be externally set to one of the following two logic states as
shown below:
f
OSC
"One"
"Zero"
Td
Address/
Data Bit
Bit Time (Td)
Since the bit time is derived from the crystal frequency, HT16xTx/HT12xTx provides a voltage
and temperature invariance bit time. The formulation of the bit time related with crystal selection is
shown below:
HT16x2T3/HT12x2T3: Td=24/(fcx2500)
HT16x2T4/HT12x2T4: Td=168/(fcx12500)
Note: fc=crystal/10
6
Rev. 1.00
5
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