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HT16514 参数 Datasheet PDF下载

HT16514图片预览
型号: HT16514
PDF下载: 下载PDF文件 查看货源
内容描述: 点字符VFD控制器及驱动器 [Dot Character VFD Controller & Driver]
分类和应用: 驱动器控制器
文件页数/大小: 39 页 / 657 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT16514  
Pin Description  
Pin Name  
I/O  
Description  
Logic System (Microprocessor Interface)  
When parallel mode is selected, this pin is utilized to select the register, either Instruction Reg-  
ister or Data Register.  
0: IR (Instruction Register)  
RS, ST  
I
1: DR (Data Register)  
When serial mode is selected, this pin performs strobe input. Data can be set as input when  
this signal goes 0.  
During the next rising edge of this signal, command processing is performed.  
When M68 parallel mode is selected (E), this pin is write enable. Writes data at the falling edge.  
When i80 parallel mode is selected (RD), this pin is read enable. When this pin is ²Low², data is  
output to the data Bus.  
E (RD), SCK  
CS  
I
I
When Serial mode is selected, this pin is shift clock input, data will be written at the rising edge.  
When this pin is ²Low², the device is active.  
Connected to an external resistor to generate an oscillation frequency.  
Oscillator signal output pin  
OSCI  
I
OSCO  
O
XOUT  
O
When M68 parallel mode is selected (R, W), this pin is data mode select pin  
(0: write, 1: read).  
When i80 parallel mode is selected (WR), this pin is a write enable pin. Data will be written at  
R, W (WR)  
I
rising edge signal.  
When serial mode is selected, connect this pin to ²Hi² or ²Low². Read or Write is chosen by in-  
struction.  
When serial mode is selected, this pin is used as I/O pin.  
SI, SO  
I/O  
When parallel mode is selected, this pin needs to be connected to ²Hi² or ²Low².  
When parallel mode is selected, these pins are used as I/O pins.  
DB0~DB7  
I/O Data are stored sequentially, the first bit which is sent to the HT16514 is MSB.  
If 4 bits mode is selected, only DB4~DB7 are used.  
Initialize all the internal register and commands.  
RESET  
I
All segments and digits are fixed PGND.  
Set the duty ratio. Duty ratio will determine the number of grid.  
DS0, DS1  
I
The relationship between duty ratio and these pins is shown in Table 1-1.  
Select interface mode (parallel mode or serial mode)  
0: Serial mode  
IM  
I
1: Parallel mode  
In parallel mode, instruction will determine the length of word.  
Select interface mode (i80 type CPU mode or M68 type CPU mode)  
MPU  
DLS  
I
I
0: i80 type CPU mode  
1: M68 type CPU mode  
Select number of display line when power ON reset or resetting.  
0: Select 1 line (N=0), ²N² is display line select flag in Function set command.  
1: Select 2 line (N=1)  
RL1, RL2  
TESTI  
I
I
Set segment outputs pin assignment. The selection table is listed as Table 1-2 & Table 1-7  
0 or open: Normal operation mode  
1: Test mode  
TESTO  
O
For IC testing only, leave this pin open.  
Logic System ( To External Extension Driver)  
SDO  
SLK  
O
O
Serial data output for extension digit driver.  
Shift clock pulse for extension digit driver.  
Active during rising edge  
Rev. 1.00  
3
October 4, 2006