HT16512
Symbol
Parameter
Test Conditions
V
DD
5V
5V
¾
¾
5V
5V
5V
Conditions
V
OH
=V
DD
-2V
G0~G5,
S11/G10~S15/G6
V
OL
=0.4V
¾
¾
LED0~LED3,
I
OH1
=-1mA
LED0~LED3,
I
OL1
=20mA
DO, I
OL2
=4mA
Min.
Typ.
Max.
Unit
I
OH22
I
OL3
V
IH
V
IL
V
OH1
V
OL1
V
OL2
Segment/Grid Source Current
DO Sink Current
²H²
Input Voltage
²L²
Input Voltage
High-level Output Voltage
Low-level Output Voltage
Low-level Output Voltage
-15
4
0.7V
DD
0
0.9V
DD
0
0
¾
¾
¾
¾
¾
¾
¾
¾
¾
V
DD
0.3V
DD
V
DD
1
0.4
mA
mA
V
V
V
V
V
Ta=25°C
A.C. Characteristics
Symbol
t
PHL
t
PLH
t
r1
Rise Time
t
r2
t
f
t
max
C
i
t
CW
t
SW
t
SU
t
h
t
CS
t
W
Fall Time
Input Capacitance
Clock Pulse Width
Strobe Pulse Width
Data Setup Time
Data Hold Time
Clock-Strobe Time
Wait Time
Parameter
Propagation Delay Time
Test Conditions
V
DD
Conditions
5V CLK®DO
5V C
L
=15pF, R
L
=10kW
5V
C
L
=300pF,
S0~S10
Min.
¾
¾
¾
¾
¾
1
¾
400
1
100
100
1
1
Typ. Max. Unit
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
300
100
2
0.5
120
¾
15
¾
¾
¾
¾
¾
¾
ns
ns
ms
ms
ms
MHz
pF
ns
us
ns
ns
ms
ms
C
L
=300pF,
5V G0~G5,
S11/G10~S15/G6
5V C
L
=300pF, Sn, Gn
5V
5V
5V
5V
5V
5V
5V
¾
¾
¾
¾
¾
CLK rising edge to
CS rising edge
CLK rising edge to
CLK falling edge
Maximum Clock Frequency 5V Duty=50%
5
December 24, 1999
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
