HT16512
A.C. Characteristics
Ta=25°C
Test Conditions
Conditions
Symbol
Parameter
Min. Typ. Max. Unit
VDD
5V
tPHL
tPLH
tr1
100
300
2
ns
ns
ms
¾
¾
¾
¾
¾
¾
CLK®DO
Propagation Delay Time
Rise Time
CL=15pF, RL=10kW
5V
CL=300pF, S0~S10
5V
CL=300pF, G0~G5,
S11/G10~S15/G6
tr2
5V
5V
0.5
¾
¾
ms
tf
CL=300pF, Sn, Gn
Fall Time
120
¾
15
¾
¾
¾
¾
¾
¾
¾
1
¾
¾
¾
¾
¾
¾
¾
¾
¾
ms
MHz
pF
ns
tmax
Ci
Maximum Clock Frequency
Input Capacitance
Clock Pulse Width
Strobe Pulse Width
Data Setup Time
Data Hold Time
Clock-Strobe Time
Wait Time
5V Duty=50%
5V
5V
5V
5V
5V
¾
¾
¾
¾
¾
¾
400
1
tCW
tSW
tSU
th
us
100
100
1
ns
ns
tCS
tW
5V CLK rising edge to CS rising edge
5V CLK rising edge to CLK falling edge
ms
1
ms
Functional Description
Display RAM and Display Mode
The 16 uniform sections available form 8 steps dimmer
via 3-bit binary code. The 8-step dimmer includes 1/16,
2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The
1/16 pulse width indicates minimum lightness. The
14/16 pulse width represents maximum lightness. (Re-
fer to the display control command).
The static display RAM is organized into 22´8 bits and
stores the data transmitted from an external device to
the HT16512 through a serial interface. The contents of
the RAM are directly mapped to the contents of the VFD
driver. Data in the RAM can be accessed through the
data setting, address setting and display control com-
mands. It is assigned addresses in 8-bit unit as follows:
Key Matrix and Key-Input Data Storage RAM
The key matrix scans the series key states at each level
of the key strobe signal (S0/K0~S5/K5) output of the
HT16512. The key strobe signal outputs are
time-multiplexed signals from S0/K0~S5/K5. The states
of inputs K0~K3 are sampled by strobe signal
S0/K0~S5/K5 and latched into the register.
S
0
~
S
3
S
4
~
~
S
7
S
8
S
1
1
S
1
2
~
S
1
5
A
d
d
r
e
s
s
:
0
0
0
2
H
H
0
0
0
0
0
1
3
5
7
9
H
H
H
H
H
D
D
D
D
i
i
i
i
g
g
g
g
i
i
i
i
t
t
t
t
0
1
2
3
0
4
H
0
6
H
0
8
H
D
D
D
D
D
D
i
i
i
i
i
i
g
g
g
g
g
g
i
i
i
i
i
i
t
t
t
t
t
t
4
5
6
7
8
9
0
A
H
0
B
H
The key matrix is made up of a 6´4 matrix, as shown be-
0
C
H
0
D
H
low.
0
E
H
0
F
H
S
0
/
K
0
S
1
/
K
1
S
2
/
K
2
S
3
/
K
3
S
4
/
K
4
S
5
/
K
5
1
1
0
2
H
H
1
1
1
1
3
5
H
H
H
K
K
K
K
0
1
2
3
1
4
H
D
i
g
i
t
1
0
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
Dimming Control
D
e
t
a
i
l
HT16512 provides 8-step dimmer function on display by
controlling the 3-bit binary command code. The full
pulse width of grid signal is divides into 16 uniform sec-
tions by PWM (pulse width modulation) technology.
K
e
y
m
a
t
r
i
x
Rev. 1.40
4
May 3, 2005
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
