HT1623
Pad Assignment
S E G 4 7
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
C O M 3
2 0
C O M 4
2 1
C O M 5
2 2
C O M 6
2 3
C O M 7
2 4
S E G 0
2 5
S E G 1
2 6
S E G 2
2 7
S E G 3
2 8
S E G 4
2 9
S E G 5
3 0
S E G 6
3 1
S E G 7
3 2
S E G 8
3 3
S E G 9
3 4
S E G 1 0
3 5
S E G 1 1
3 6
S E G 1 2
3 7
S E G 1 3
(0 ,0 )
7 1
S E G 4 6
7 0
S E G 4 5
6 9
S E G 4 4
6 8
S E G 4 3
6 7
S E G 4 2
6 6
S E G 4 1
6 5
S E G 4 0
6 4
S E G 3 9
6 3
S E G 3 8
6 2
S E G 3 7
6 1
S E G 3 6
6 0
S E G 3 5
5 9
S E G 3 4
5 8
S E G 3 3
5 7
S E G 3 2
5 6
C S
R D
W R
D A T A
V S S
O S C I
O S C O
V D D
V L C D
IR Q
B Z
B Z
T 1
T 2
T 3
C O M 0
C O M 1
C O M 2
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
4 3
4 2
4 1
4 0
3 9
3 8
S E G 3 1
S E G 3 0
S E G 2 9
S E G 2 8
S E G 2 7
S E G 2 6
S E G 2 5
S E G 2 4
S E G 2 3
S E G 2 2
S E G 2 1
S E G 2 0
S E G 1 9
S E G 1 8
S E G 1 7
S E G 1 6
S E G 1 5
S E G 1 4
Chip size: 177
´
171 (mil)
2
* The IC substrate should be connected to VDD in the PCB layout artwork.
3
April 21, 2000
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
