HT1622
A.C. Characteristics
Ta=25°C
Test Conditions
Conditions
Symbol
Parameter
Min.
Typ. Max. Unit
VDD
fSYS1
System Clock
System Clock
3V On-chip RC oscillator
5V
22
24
¾
¾
44
48
¾
¾
¾
¾
¾
¾
¾
32
32
40
40
¾
¾
80
80
¾
¾
¾
kHz
kHz
kHz
kHz
Hz
3V
External clock source
5V
32
fSYS2
32
3V
On-chip RC oscillator
5V
64
fLCD1
LCD Frame Frequency
64
Hz
3V
External clock source
5V
64
¾
fLCD2
tCOM
fCLK1
LCD Frame Frequency
LCD Common Period
64
¾
n/fLCD
n: Number of COM
sec
¾
3V
5V
3V
5V
150 kHz
300 kHz
¾
¾
¾
¾
Serial Data Clock (WR pin)
Duty cycle 50%
75
kHz
fCLK2
Serial Data Clock (RD pin)
Duty cycle 50%
CS
150 kHz
Serial Interface Reset Pulse Width
(Figure 3)
tCS
250
ns
¾
¾
¾
Write mode
Read mode
Write mode
Read mode
3.34
6.67
1.67
3.34
¾
¾
¾
¾
¾
¾
¾
¾
3V
ms
tCLK
WR, RD Input Pulse Width (Figure 1)
5V
ms
ns
ns
ns
ns
ns
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
Rise/Fall Time Serial Data Clock Width
(Figure 1)
tr, tf
120
120
120
100
100
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
Setup Time for DATA to WR, RD Clock
Width (Figure 2)
tsu
Hold Time for DATA to WR, RD, Clock
Width (Figure 2)
th
Setup Time for CS to WR, RD Clock
Width (Figure 3)
tsu1
Hold Time for CS to WR, RD Clock
Width (Figure 3)
th1
t
t
V
A
L
I
D
D
A
T
A
f
r
V
G
D
D
V
D
D
9
0
%
W
R
,
R
D
D
B
5
0
%
5
0
%
C
l
o
c
k
N
D
1
0
%
G
N
D
t
t
C L
C
L
K
K
t
t
s
u
h
V
G
D
D
W
R
,
R
D
Figure 1
5
0
%
C
l
o
c
k
N
D
Figure 2
t
C
S
V
G
D
D
5
0
%
C
S
N
D
t
t
h 1
s
u
1
V
G
D
D
W
R
,
R
D
5
0
%
C
l
o
c
k
N
D
F
I
R
S
T
L
A
S
T
C
l
o
c
k
C
l
o
c
k
Figure 3
Rev. 1.40
5
February 6, 2007