HT16220
Application Circuits
C
S
D
V
D
D
*
*
R
W
D
V
R
V
L
C
D
R
A
T
A
B
Z
M
C
U
H
T
1
6
2
2
0
P
i
e
z
o
*
R
B
Z
I
R
Q
O
S
C
I
C
r
y
s
t
a
l
3
2
7
6
8
H
z
O
s
c
i
l
l
a
t
o
r
O
S
C
O
C
O
M
0
~
C
O
M
7
S
E
G
0
~
S
E
G
3
1
1
/
4
B
i
a
s
,
1
/
8
D
u
t
y
L
C
D
P
a
n
e
l
Note: The connection of IRQ and RD pin can be selected depending on the requirement of the MCU.
The voltage applied to VLCD pin must be lower than VDD
.
Adjust VR to fit LCD display, at VDD=5V, VLCD=4V, VR=15kW±20%.
Adjust R (external pull-high resistance) to fit user¢s time base clock.
Command Summary
Name
ID
Command Code
D/C
D
Function
Read data from the RAM
Write data to the RAM
Def.
READ
1 1 0 A5A4A3A2A1A0D0D1D2D3
WRITE
1 0 1 A5A4A3A2A1A0D0D1D2D3
1 0 1 A5A4A3A2A1A0D0D1D2D3
D
READ-MODIFY-
WRITE
D
C
Read and Write data to the RAM
Turn off both system oscillator and LCD
bias generator
SYS DIS
1 0 0 0000-0000-X
Yes
Yes
SYS EN
1 0 0 0000-0001-X
1 0 0 0000-0010-X
1 0 0 0000-0011-X
1 0 0 0000-0100-X
1 0 0 0000-0101-X
1 0 0 0000-0110-X
1 0 0 0000-0111-X
1 0 0 0000-1000-X
C
C
C
C
C
C
C
C
Turn on system oscillator
Turn off LCD display
LCD OFF
LCD ON
Turn on LCD display
TIMER DIS
WDT DIS
TIMER EN
WDT EN
Disable time base output
Disable WDT time-out flag output
Enable time base output
Enable WDT time-out flag output
Turn off tone outputs
Yes
Yes
TONE OFF
Yes
Clear the contents of the time base
generator
CLR TIMER
1 0 0 0000-1101-X
C
CLR WDT
TONE 4K
TONE 2K
IRQ DIS
IRQ EN
1 0 0 0000-1111-X
1 0 0 010X-XXXX-X
1 0 0 0110-XXXX-X
1 0 0 100X-0XXX-X
1 0 0 100X-1XXX-X
C
C
C
C
C
Clear the contents of the WDT stage
Tone frequency output: 4kHz
Tone frequency output: 2kHz
Disable IRQ output
Yes
Enable IRQ output
Rev. 1.20
10
May 19, 2004
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
