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HT1621B(48LQPF) 参数 Datasheet PDF下载

HT1621B(48LQPF)图片预览
型号: HT1621B(48LQPF)
PDF下载: 下载PDF文件 查看货源
内容描述: [Interface Circuit]
分类和应用:
文件页数/大小: 20 页 / 182 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT1621
erator. The LCD ON command, on the other hand, turns
the LCD display on by enabling the LCD bias generator.
The BIAS and COM are the LCD panel related com-
mands. Using the LCD related commands, the HT1621
can be compatible with most types of LCD panels.
Command Format
The HT1621 can be configured by the S/W setting. There
are two mode commands to configure the HT1621 re-
sources and to transfer the LCD display data. The configu-
ration mode of the HT1621 is called command mode, and
its command mode ID is
1 0 0.
The command mode con-
sists of a system configuration command, a system
frequency selection command, a LCD configuration com-
mand, a tone frequency selection command, a timer/WDT
setting command, and an operating command. The data
mode, on the other hand, includes READ, WRITE, and
READ-MODIFY-WRITE operations. The following are the
data mode IDs and the command mode ID:
Operation
Read
Write
Read-Modify-Write
Command
Mode
Data
Data
Data
Command
ID
110
101
101
100
Crystal Selection
A 32768Hz crystal can be directly connected to the
HT1621 via OSCI and OSCO. In order to obtain the cor-
rect frequency, two additional load capacities (C1, C2)
are needed. The value of the capacity depends on how
accurate the crystal is. We suggest that you can follow
the table, which suggests the value of capacities.The ta-
ble illustrations the suggestion value of capacities (C1,
C2)
Crystal Error
±10ppm
10~20ppm
Capacity Value
0~10p
10~20p
the data and command issued between the host controller
and the HT1621 are first disabled and then initialized. Be-
fore issuing a mode command or mode switching, a high
level pulse is required to initialize the serial interface of the
HT1621. The DATA line is the serial data input/output line.
Data to be read or written or commands to be written have
to be passed through the DATA line. The RD line is the
READ clock input. Data in the RAM are clocked out on the
falling edge of the RD signal, and the clocked out data will
then appear on the DATA line. It is recommended that the
host controller read in correct data during the interval be-
tween the rising edge and the next falling edge of the RD
signal. The WR line is the WRITE clock input. The data,
address, and command on the DATA line are all clocked
into the HT1621 on the rising edge of the WR signal. There
is an optional IRQ line to be used as an interface between
the host controller and the HT1621. The IRQ pin can be
selected as a timer output or a WDT overflow flag output
by the S/W setting. The host controller can perform the
time base or the WDT function by being connected with
the IRQ pin of the HT1621.
The mode command should be issued before the data
or command is transferred. If successive commands
have been issued, the command mode ID, namely
1 0 0,
can be omitted. While the system is operating in the
non-successive command or the non-successive ad-
dress data mode, the CS pin should be set to
²1²
and the
previous operation mode will be reset also. Once the CS
pin returns to
²0²
a new operation mode ID should be is-
sued first.
Interfacing
Only four lines are required to interface with the
HT1621. The CS line is used to initialize the serial inter-
face circuit and to terminate the communication between
the host controller and the HT1621. If the CS pin is set to 1,
3 2 7 6 8 H z
O S C I
C 1
C 2
O S C O
Timing Diagrams
READ Mode (Command Code : 1 1 0)
C S
W R
R D
1
1
0
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 )
1
1
9
D A T A
0
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 )
November 26, 2004
Rev. 1.60