HT12A/HT12E
Block Diagram
TE Trigger
HT12E
O S C 2
O S C 1
T E
O s c illa to r
¸
3 D iv id e r
D a ta S e le c t
& B u ffe r
S y n c .
C ir c u it
D O U T
A 0
1 2 T r a n s m is s io n
G a te C ir c u it
A 7
¸
1 2 C o u n te r &
1 o f 1 2 D e c o d e r
B in a r y D e te c to r
A D 8
A D 1 1
V D D
V S S
DATA Trigger
HT12A
X 2
X 1
O s c illa to r
L /M B
A 0
1 2 T r a n s m is s io n
G a te C ir c u it
A 7
¸
5 7 6 D iv id e r
D a ta S e le c t
& B u ffe r
S y n c .
C ir c u it
D O U T
¸
1 2 C o u n te r &
1 o f 1 2 D e c o d e r
B in a r y D e te c to r
D 8
D 1 1
V D D
V S S
Note:
The address data pins are available in various combinations (refer to the address/data table).
Pin Assignment
8 -A d d re s s
4 -D a ta
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
9
8
7
6
5
4
3
2
1
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
V D D
D O U T
X 1
X 2
L /M
D 1 1
D 1 0
D 9
D 8
8 -A d d re s s
4 -D a ta
N C
1
2
3
4
5
6
7
8
9
1 0
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
N C
V D D
D O U T
X 1
X 2
L /M
D 1 1
D 1 0
D 9
D 8
8 -A d d re s s
4 -A d d r e s s /D a ta
8 -A d d re s s
4 -A d d r e s s /D a ta
N C
1
2
3
4
5
6
7
8
9
1 0
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
N C
V D D
D O U T
O S C 1
O S C 2
T E
A D 1 1
A D 1 0
A D 9
A D 8
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
9
8
7
6
5
4
3
2
1
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
V D D
D O U T
O S C 1
O S C 2
T E
A D 1 1
A D 1 0
A D 9
A D 8
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
H T 1 2 A
1 8 D IP -A
H T 1 2 A
2 0 S O P -A
H T 1 2 E
1 8 D IP -A
H T 1 2 E
2 0 S O P -A
Rev. 1.10
2
January 24, 2003
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
