HT12A/HT12E
Pin Description
Pin Name
A0~A7
I/O
I
Internal
Connection
CMOS IN Pull-high
(HT12A)
Description
Input pins for address A0~A7 setting
These pins can be externally set to VSS or left open
NMOS TRANSMISSION
GATE PROTECTION
DIODE (HT12E)
AD8~AD11
I
NMOS TRANSMISSION
Input pins for address/data AD8~AD11 setting
GATE PROTECTION
These pins can be externally set to VSS or left open
DIODE (HT12E)
CMOS IN Pull-high
CMOS OUT
CMOS IN Pull-high
CMOS IN Pull-high
OSCILLATOR 1
OSCILLATOR 1
OSCILLATOR 2
OSCILLATOR 2
¾
¾
Input pins for data D8~D11 setting and transmission enable, active
low
These pins should be externally set to VSS or left open (see Note)
Encoder data serial transmission output
Latch/Momentary transmission format selection pin:
Latch: Floating or VDD
Momentary: VSS
Transmission enable, active low (see Note)
Oscillator input pin
Oscillator output pin
455kHz resonator oscillator input
455kHz resonator oscillator output
Negative power supply, ground
Positive power supply
D8~D11
DOUT
L/M
TE
OSC1
OSC2
X1
X2
VSS
VDD
Note:
I
O
I
I
I
O
I
O
I
I
D8~D11 are all data input and transmission enable pins of the HT12A.
TE is a transmission enable pin of the HT12E.
Approximate Internal Connections
N M O S
T R A N S M IS S IO N
G A T E
C M O S IN
P u ll- h ig h
C M O S O U T
E N
O S C 1
O S C IL L A T O R
1
O S C 2
O S C IL L A T O R
2
N M O S T R A N S M IS S IO N G A T E
P R O T E C T IO N D IO D E
X 2
V
D D
X 1
Rev. 1.10
3
January 24, 2003