HT48RA0-3/HT48CA0-3
Carrier Output
·
Carrier output generator
The carrier generator consists of a 9-bit counter and two modulo registers for setting the high-level and low-level peri-
ods - CARH and CARL respectively.
Register
CARL0
CARL1
CARH0
Bit7
CL.7
¾
Bit6
CL.
Bit5
CL.
Bit4
CL.
Bit3
CL.3
¾
Bit2
CL.2
¾
Bit1
CL.1
Bit0
CL.0
CL.8
CH.0
¾
¾
¾
Fix ²0²
CH.1
CH.7
CH.6
CH.5
CH.4
CH.3
CH.2
CH.9
CARH1
CH.8
¾
¾
¾
¾
¾
¾
(CARY)
CARL0 (1AH) Register, CARL1 (1BH), CARH0 (1CH) Register, CARH1 (1DH), Register
Note:
1. CARH1.1 (CARY) initial value is ²1².
2. CARL1.2 (CARH1.2)~CARL1.7 (CARH1.7) are unused bits, read as ²0².
The carrier duty ratio and carrier frequency can be determined by setting the high-level and low-level widths using the
respective modulo registers. Each of these widths can be set in a range of 500ns to 64ms at fSYS = 4MHz.
CARH (CARH1.0, CARH0.7~CARH0.0) and CARL (CARL1.0, CARL0.7~CARL0.0) are read and written using in-
structions.
Example:
MOV A,XXH
MOV CARL0,A
MOV A,XXH
MOV CARL1,A
MOV A,XXH
MOV CARH0,A
MOV A,XXH
MOV CARH1,A
; XXH = 00H~FFH
; XXH £ 01H, CL.8 (CARL1.0)
; XXH = 00H~FFH
; XXH ³ 02H, CH.8 (CARH1.0)
; The carrier is started by clearing CARY(CARH1.1)=²0²
CLR
CARH1.1
C
A
R
H
C
A
R
L
C
A
R
H
1
C
A
R
H
0
C
A
R
L
1
C
A
R
L
0
C
a
r
r
i
e
r
C
H
.
8
C
H
.
7
C
H
.
6
C
H
.
5
C
H
.
4
g
C
H
.
3
C
H
.
2
C
H
.
1
C
H
.
0
C
L
.
8
C
L
.
7
C
L
.
6
C
L
.
5
C
L
.
4
C
L
.
3
C
L
.
2
C
L
.
1
C
L
.
0
C
C
H
A
.
9
C
N
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o
.
t
9
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(
0
)
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(
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F
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S Y S
9
-
b
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t
f
9
(
N
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2
)
C
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a
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S
Y
S
Configuration of Remote Controller Carrier Generator
Note:
1. Bit 9 of the modulo register for setting the low-level period (CARL) is fixed to ²0².
2. t9: Flag that enables timer output (timer block, see Timer Configuration)
Rev.1.10
12
October 12, 2007
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
