BS83B08A-3/BS83B12A-3/BS83B16A-3
BS83B08A-4/BS83B12A-4/BS83B16A-4
8-Bit Touch Key Flash MCU
Pin Descriptions
Theꢀfunctionꢀofꢀeachꢀpinꢀisꢀlistedꢀinꢀtheꢀfollowingꢀtables,ꢀhoweverꢀtheꢀdetailsꢀbehindꢀhowꢀeachꢀpinꢀisꢀ
configuredꢀisꢀcontainedꢀinꢀotherꢀsectionsꢀofꢀtheꢀdatasheet.
BS83B08A-3/BS83B08A-4
Pin Name
Function
OPT
I/T
ST C�OS General purpose I/O. Register enabled pull-up and wake-up
ST SPI data input
O/T
Description
PAWU
PAPU
PA0
PA0/SDI/SDA
SDI
—
—
—
SDA
ST N�OS IꢁC data
PAWU
PAPU
PA1
SDO
PAꢁ
ST C�OS General purpose I/O. Register enabled pull-up and wake-up
PA1/SDO
SI�C0
—
C�OS SPI data output
PAWU
PAPU
ST C�OS General purpose I/O. Register enabled pull-up and wake-up
PAꢁ/SCK/SCL
PAꢃ/SCS
SCK
SCL
SI�C0
SI�C0
ST C�OS SPI serial clock
ST N�OS IꢁC clock
PAWU
PAPU
PAꢃ
SCS
ST C�OS General purpose I/O. Register enabled pull-up and wake-up
ST C�OS SPI slave select
SI�C0
PAWU
PAPU
PA4
ST C�OS General purpose I/O. Register enabled pull-up and wake-up
PA4/INT
PA7
INT
INTEG
ST
—
External interrupt
PAWU
PAPU
PA7
ST C�OS General purpose I/O. Register enabled pull-up and wake-up
ST C�OS General purpose I/O. Register enabled pull-up
PB0~PBꢃ
PBPU
PB0/KEY1~
PBꢃ/KEY4
KEY1~KEY4 TK�0C1 NSI
—
Touch keꢀ inputs
PB4~PB7
PBPU
ST C�OS General purpose I/O. Register enabled pull-up
PB4/KEY5~
PB7/KEY8
KEY5~
KEY8
TK�1C1 NSI
—
—
—
—
—
Touch keꢀ inputs
Power supplꢀ *
VDD
VDD
AVDD
VSS
—
—
—
—
PWR
PWR
PWR
PWR
Touch Keꢀ Circuit PWR and it should be double bonded to
VDD*
AVDD
VSS
Ground **
Touch Keꢀ Circuit PWR and it should be double bonded to
VSS**
AVSS
AVSS
Note:ꢀI/T:ꢀInputꢀtype
O/T:ꢀOutputꢀtype
OP:ꢀOptionalꢀbyꢀregisterꢀselection
PWR:ꢀPower
ST:ꢀchmittꢀTriggerꢀinput
CMOS:ꢀCMOSꢀoutput
NMOS:ꢀNMOSꢀoutput
NSI:ꢀNon-standardꢀinput
*:ꢀVDDꢀisꢀtheꢀdeviceꢀpowerꢀsupplyꢀwhileꢀAVDDꢀisꢀtheꢀtouchꢀkeyꢀcircuitꢀpowerꢀsupply.ꢀTheꢀAVDDꢀpinꢀisꢀ
bondedꢀtogetherꢀinternallyꢀwithꢀVDD.
**:ꢀVSSꢀisꢀtheꢀdeviceꢀgroundꢀpinꢀwhileꢀAVSSꢀisꢀtheꢀtouchꢀkeyꢀcircuitꢀgroundꢀpin.ꢀTheꢀAVSSꢀpinꢀisꢀbondedꢀ
togetherꢀinternallyꢀwithꢀVSS.
Rev. 1.00
10
�aꢀ 0ꢁꢂ ꢁ01ꢃ