BS83A04A-3/BS83A04A-4
8-bit Touch Key Flash MCU
SLOW Mode to NORMAL Mode Switching
InꢀSLOWꢀModeꢀtheꢀsystemꢀusesꢀtheꢀLIRCꢀlowꢀspeedꢀsystemꢀoscillator.ꢀToꢀswitchꢀbackꢀtoꢀtheꢀ
NORMALꢀMode,ꢀwhereꢀtheꢀhighꢀspeedꢀsystemꢀoscillatorꢀisꢀused,ꢀtheꢀHLCLKꢀbitꢀshouldꢀbeꢀsetꢀtoꢀ
"1"ꢀorꢀHLCLKꢀbitꢀisꢀ"0",ꢀbutꢀCKS2~CKS0ꢀisꢀsetꢀtoꢀ"010",ꢀ"011",ꢀ"100",ꢀ"101",ꢀ"110"ꢀorꢀ"111".ꢀ
Asꢀaꢀcertainꢀamountꢀofꢀtimeꢀwillꢀbeꢀrequiredꢀforꢀtheꢀhighꢀfrequencyꢀclockꢀtoꢀstabilise,ꢀtheꢀstatusꢀofꢀ
theꢀHTOꢀbitꢀisꢀchecked.ꢀTheꢀamountꢀofꢀtimeꢀrequiredꢀforꢀhighꢀspeedꢀsystemꢀoscillatorꢀstabilizationꢀ
dependsꢀuponꢀwhichꢀhighꢀspeedꢀsystemꢀoscillatorꢀtypeꢀisꢀused.
Entering the SLEEP Mode
ThereꢀisꢀonlyꢀoneꢀwayꢀforꢀtheꢀdeviceꢀtoꢀenterꢀtheꢀSLEEPꢀModeꢀandꢀthatꢀisꢀtoꢀexecuteꢀtheꢀ"HALT"ꢀ
instructionꢀinꢀtheꢀapplicationꢀprogramꢀwithꢀtheꢀIDLENꢀbitꢀinꢀSMODꢀregisterꢀequalꢀtoꢀ"0"ꢀandꢀtheꢀWDTꢀ
isꢀon.ꢀWhenꢀthisꢀinstructionꢀisꢀexecutedꢀunderꢀtheꢀconditionsꢀdescribedꢀabove,ꢀtheꢀfollowingꢀwillꢀoccur:
•ꢀ TheꢀsystemꢀclockꢀandꢀTimeꢀBaseꢀclockꢀwillꢀbeꢀstoppedꢀandꢀtheꢀapplicationꢀprogramꢀwillꢀstopꢀatꢀtheꢀ
"HALT"ꢀinstruction,ꢀbutꢀtheꢀWDTꢀwillꢀremainꢀwithꢀtheꢀclockꢀsourceꢀcomingꢀfromꢀtheꢀfSUBꢀclock
•ꢀ TheꢀDataꢀMemoryꢀcontentsꢀandꢀregistersꢀwillꢀmaintainꢀtheirꢀpresentꢀcondition.
•ꢀ TheꢀWDTꢀwillꢀbeꢀclearedꢀandꢀresumeꢀcounting
.
•ꢀ TheꢀI/Oꢀportsꢀwillꢀmaintainꢀtheirꢀpresentꢀconditions.
•ꢀ Inꢀtheꢀstatusꢀregister,ꢀtheꢀPowerꢀDownꢀflag,ꢀPDF,ꢀwillꢀbeꢀsetꢀandꢀtheꢀWatchdogꢀtime-outꢀflag,ꢀTO,ꢀ
willꢀbeꢀcleared.
Entering the IDLE0 Mode
ThereꢀisꢀonlyꢀoneꢀwayꢀforꢀtheꢀdeviceꢀtoꢀenterꢀtheꢀIDLE0ꢀModeꢀandꢀthatꢀisꢀtoꢀexecuteꢀtheꢀ"HALT"ꢀ
instructionꢀinꢀtheꢀapplicationꢀprogramꢀwithꢀtheꢀIDLENꢀbitꢀinꢀSMODꢀregisterꢀisꢀequalꢀtoꢀ"1"ꢀandꢀtheꢀ
FSYSONꢀbitꢀinꢀCTRLꢀregisterꢀisꢀequalꢀtoꢀ"0".ꢀWhenꢀthisꢀinstructionꢀisꢀexecutedꢀunderꢀtheꢀconditionsꢀ
describedꢀabove,ꢀtheꢀfollowingꢀwillꢀoccur:
•ꢀ Theꢀsystemꢀclockꢀwillꢀbeꢀstoppedꢀandꢀtheꢀapplicationꢀprogramꢀwillꢀstopꢀatꢀtheꢀ"HALT"ꢀinstruction,ꢀ
butꢀtheꢀTimeꢀBaseꢀclockꢀandꢀfSUBꢀclockꢀwillꢀbeꢀon
.
•ꢀ TheꢀDataꢀMemoryꢀcontentsꢀandꢀregistersꢀwillꢀmaintainꢀtheirꢀpresentꢀcondition.
•ꢀ TheꢀWDTꢀwillꢀbeꢀclearedꢀandꢀresumeꢀcountingꢀ
•ꢀ TheꢀI/Oꢀportsꢀwillꢀmaintainꢀtheirꢀpresentꢀconditions.
•ꢀ Inꢀtheꢀstatusꢀregister,ꢀtheꢀPowerꢀDownꢀflag,ꢀPDF,ꢀwillꢀbeꢀsetꢀandꢀtheꢀWatchdogꢀtime-outꢀflag,ꢀTO,ꢀ
willꢀbeꢀcleared.
Entering the IDLE1 Mode
ThereꢀisꢀonlyꢀoneꢀwayꢀforꢀtheꢀdeviceꢀtoꢀenterꢀtheꢀIDLE1ꢀModeꢀandꢀthatꢀisꢀtoꢀexecuteꢀtheꢀ"HALT"ꢀ
instructionꢀinꢀtheꢀapplicationꢀprogramꢀwithꢀtheꢀIDLENꢀbitꢀinꢀSMODꢀregisterꢀisꢀequalꢀtoꢀ"1"ꢀandꢀtheꢀ
FSYSONꢀbitꢀinꢀCTRLꢀregisterꢀisꢀequalꢀtoꢀ"1".ꢀWhenꢀthisꢀinstructionꢀisꢀexecutedꢀunderꢀtheꢀconditionsꢀ
describedꢀabove,ꢀtheꢀfollowingꢀwillꢀoccur:
•ꢀ TheꢀsystemꢀclockꢀandꢀTimeꢀBaseꢀclockꢀandꢀfSUBꢀclockꢀwillꢀbeꢀonꢀandꢀtheꢀapplicationꢀprogramꢀwillꢀ
stopꢀatꢀtheꢀ"HALT"ꢀinstruction
•ꢀ TheꢀDataꢀMemoryꢀcontentsꢀandꢀregistersꢀwillꢀmaintainꢀtheirꢀpresentꢀcondition.
•ꢀ TheꢀWDTꢀwillꢀbeꢀclearedꢀandꢀresumeꢀcounting.
•ꢀ TheꢀI/Oꢀportsꢀwillꢀmaintainꢀtheirꢀpresentꢀconditions.
•ꢀ Inꢀtheꢀstatusꢀregister,ꢀtheꢀPowerꢀDownꢀflag,ꢀPDF,ꢀwillꢀbeꢀsetꢀandꢀtheꢀWatchdogꢀtime-outꢀflag,ꢀTO,ꢀ
willꢀbeꢀcleared.
Rev. 1.00
ꢄ9
�eꢀꢁꢂaꢁꢃ ꢄꢅꢆ ꢄ01ꢇ