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BC68F2420BC68F2420 参数 Datasheet PDF下载

BC68F2420BC68F2420图片预览
型号: BC68F2420BC68F2420
PDF下载: 下载PDF文件 查看货源
内容描述: [315/433MHz RF Super-regenerative Receiver SoC Flash MCU]
分类和应用:
文件页数/大小: 116 页 / 6126 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
 浏览型号BC68F2420BC68F2420的Datasheet PDF文件第5页浏览型号BC68F2420BC68F2420的Datasheet PDF文件第6页浏览型号BC68F2420BC68F2420的Datasheet PDF文件第7页浏览型号BC68F2420BC68F2420的Datasheet PDF文件第8页浏览型号BC68F2420BC68F2420的Datasheet PDF文件第10页浏览型号BC68F2420BC68F2420的Datasheet PDF文件第11页浏览型号BC68F2420BC68F2420的Datasheet PDF文件第12页浏览型号BC68F2420BC68F2420的Datasheet PDF文件第13页  
BC68F2420  
315/433MHz RF Super-regenerative  
Receiver SoC Flash MCU  
Pin Description  
WithꢀtheꢀexceptionꢀofꢀtheꢀpowerꢀpinsꢀandꢀsomeꢀrelevantꢀRFꢀcontrolꢀpins,ꢀallꢀpinsꢀonꢀtheꢀdeviceꢀcanꢀ  
beꢀreferencedꢀbyꢀtheirꢀPortꢀname,ꢀe.g.ꢀPA0,ꢀPA1ꢀetc.,ꢀwhichꢀreferꢀtoꢀtheꢀdigitalꢀI/Oꢀfunctionꢀofꢀtheꢀ  
pins.ꢀHoweverꢀtheseꢀPortꢀpinsꢀareꢀalsoꢀsharedꢀwithꢀotherꢀfunctionꢀsuchꢀasꢀtheꢀTimerꢀModuleꢀpinsꢀetc.ꢀ  
Theꢀfunctionꢀofꢀeachꢀpinꢀisꢀlistedꢀinꢀtheꢀfollowingꢀtable,ꢀhoweverꢀtheꢀdetailsꢀbehindꢀhowꢀeachꢀpinꢀisꢀ  
configuredꢀisꢀcontainedꢀinꢀotherꢀsectionsꢀofꢀtheꢀdatasheet.ꢀ  
AsꢀtheꢀPinꢀDescriptionꢀSummaryꢀtableꢀappliesꢀtoꢀtheꢀpackageꢀtypeꢀwithꢀtheꢀmostꢀpins,ꢀnotꢀallꢀofꢀtheꢀ  
aboveꢀlistedꢀpinsꢀmayꢀbeꢀpresentꢀonꢀpackageꢀtypesꢀwithꢀsmallerꢀnumbersꢀofꢀpins.  
Pin Name  
Function  
OPT  
I/T  
O/T  
C�OS  
Description  
PAPU  
PAWU  
General purpose I/O. Register enabled pull-up and  
wake-up  
PA0  
ST  
PA0/STCK/ICPDA/  
OCDSDA  
STCK  
ICPDA  
ST  
ST  
ST  
ST� clock input  
C�OS ICP data/address  
OCDSDA  
C�OS OCDS address/dataꢃ for EV chip onlꢀ  
PAPU  
PAWU  
General purpose I/O. Register enabled pull-up and  
wake-up  
PA1  
ST  
C�OS  
PA1/INT0/STPI  
INT0  
STPI  
ST  
ST  
External interrupt 0 input  
ST� capture input  
IFS  
PAPU  
PAWU  
PXSR  
General purpose I/O. Register enabled pull-up and  
wake-up  
PAꢁ  
ST  
C�OS  
PAꢁ/STP/ICPCK/  
OCDSCK  
STP  
PXSR  
ST  
ST  
C�OS ST� output  
ICPCK  
ICP clock  
OCDSCK  
OCDS clockꢃ for EV chip onlꢀ  
PAPU  
PAWU  
PXSR  
General purpose I/O. Register enabled pull-up and  
wake-up  
PA3  
ST  
C�OS  
PA3/STPB  
STPB  
PAꢂ  
PXSR  
C�OS ST� inverted output  
PAPU  
PAWU  
General purpose I/O. Register enabled pull-up and  
wake-up  
ST  
ST  
ST  
ST  
C�OS  
PAꢂ/INT1  
INT1  
PA5  
External interrupt 1 input  
PAPU  
PAWU  
General purpose I/O. Register enabled pull-up and  
wake-up  
C�OS  
PA5/CTCK  
CTCK  
CT� clock input  
PAPU  
PAWU  
PXSR  
General purpose I/O. Register enabled pull-up and  
wake-up  
PA6  
CTP  
PAꢄ  
ST  
C�OS  
PA6/CTP  
PXSR  
C�OS CT� output  
PAPU  
PAWU  
PXSR  
General purpose I/O. Register enabled pull-up and  
wake-up  
ST  
C�OS  
PAꢄ/CTPB  
CTPB  
PB0  
PXSR  
C�OS CT� inverted output  
PBPU  
PBWU  
PXSR  
General purpose I/O. Register enabled pull-up and  
wake-up  
ST  
C�OS  
PB0/RFDO  
RFIN  
RFDO  
RFIN  
PXSR  
C�OS RF Demodulator data output  
RF signal inputꢃ OOK RF signal source  
AN  
Rev. 1.00  
9
�aꢀ ꢁꢂꢃ ꢁ01ꢄ