BC68F2130/BC68F2140
Sub-1GHz RF Transmitter Flash MCU
Pin Assignment
VSS
VDD
1
ꢃ
3
4
5
6
ꢄ
8
16
15
14
13
1ꢃ
11
10
ꢁ
V15O
PA3/INT0
PAꢃ/PTP/ICPCK/OCDSCK
PA1/PTCK
PB4
PB5
PA0/PTPI/PTPB/ICPDA/OCDSDA
OSCꢃ
PA4/INT1
PA5/CTP
VDDRF
RFOUT
OSC1
VSSRF_PA
BC68F2130
16 NSOP-EP-A
1
VSS
VDD
ꢃ4
ꢃ
PB3
V15O
ꢃ3
3
PBꢃ
PB4
ꢃꢃ
PB1
4
PB5
ꢃ1
PB0
5
PA4/INT1
PA5/CTP
PA6/CTPB
PAꢄ/CTCK
VSSRF
VDDRF
RFOUT
VSSRF_PA
ꢃ0
1ꢁ
18
1ꢄ
16
15
14
13
PA3/INT0
6
ꢄ
PAꢃ/PTP/ICPCK/OCDSCK
8
PA1/PTCK
ꢁ
PA0/PTPI/PTPB/ICPDA/OCDSDA
OSCꢃ
OSC1
NC
10
11
1ꢃ
BC68F2140
24 SSOP-EP-A
Note:ꢀ1.ꢀIfꢀtheꢀpin-sharedꢀpinꢀfunctionsꢀhaveꢀmultipleꢀoutputs,ꢀtheꢀdesiredꢀpin-sharedꢀfunctionꢀisꢀ
determinedꢀbyꢀcorrespondingꢀsoftwareꢀcontrolꢀbits.
2.ꢀTheꢀOCDSDAꢀandꢀOCDSCKꢀpinsꢀareꢀusedꢀasꢀtheꢀOCDSꢀdedicatedꢀpins.
Pin Description
Theꢀfunctionꢀofꢀeachꢀpinꢀisꢀlistedꢀinꢀtheꢀfollowingꢀtable,ꢀhoweverꢀtheꢀdetailsꢀbehindꢀhowꢀeachꢀpinꢀisꢀ
configuredꢀisꢀcontainedꢀinꢀotherꢀsectionsꢀofꢀtheꢀdatasheet.
BC68F2130
Pin Name
Function OPT
PAPU
I/T
O/T
Description
PA0
PAWU ST C�OS General purpose I/O. Register enabled pull-up and wake-up
PAS0
PTPI
PTPB
PAS0 ST
—
PT� capture input
PA0/PTPI/PTPB/
ICPDA/OCDSDA
PAS0
—
—
C�OS PT� inverted output
ICPDA
OCDSDA
ST C�OS ICP Address/Data
ST C�OS OCDS data/address
—
PAPU
PA1
PAWU ST C�OS General purpose I/O. Register enabled pull-up and wake-up
PAS0
PA1/PTCK
PTCK
PAS0 ST
—
PT� clock input
Rev. 1.10
ꢁ
�aꢀ 1ꢁꢂ ꢃ01ꢄ
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
