ICL7106 / ICL7107
absorb the relative large capacitive currents when the back
plane (BP) voltage is switched. The BP frequency is the
clock frequency divided by 800. For three readings/sec., this
is a 60Hz square wave with a nominal amplitude of 5V. The
segments are driven at the same frequency and amplitude
and are in phase with BP when OFF, but out of phase when
ON. In all cases negligible DC voltage exists across the
segments.
V+
V+
BP
TO LCD
DECIMAL
POINTS
ICL7106
TEST
DECIMAL
POINT
SELECT
Figure 8 is the Digital Section of the ICL7107. It is identical
to the ICL7106 except that the regulated supply and back
plane drive have been eliminated and the segment drive has
been increased from 2mA to 8mA, typical for instrument size
common anode LED displays. Since the 1000 output (pin 19)
must sink current from two LED segments, it has twice the
drive capability or 16mA.
CD4030
GND
FIGURE 6. EXCLUSIVE ‘OR’ GATE FOR DECIMAL POINT DRIVE
Digital Section
In both devices, the polarity indication is “on” for negative
analog inputs. If IN LO and IN HI are reversed, this indication
can be reversed also, if desired.
Figures 7 and 8 show the digital section for the ICL7106 and
ICL7107, respectively. In the ICL7106, an internal digital
ground is generated from a 6V Zener diode and a large
P-Channel source follower. This supply is made stiff to
a
a
a
f
f
f
a
b
b
b
g
g
g
c
e
e
e
c
c
c
b
d
d
d
BACKPLANE
21
LCD PHASE DRIVER
7
7
7
TYPICAL SEGMENT OUTPUT
V+
SEGMENT
DECODE
SEGMENT
DECODE
SEGMENT
DECODE
÷200
0.5mA
LATCH
SEGMENT
OUTPUT
2mA
1000’s
100’s
10’s
1’s
COUNTER
COUNTER
COUNTER
COUNTER
INTERNAL DIGITAL GROUND
TO SWITCH DRIVERS
1
FROM COMPARATOR OUTPUT
V+
CLOCK
6.2V
LOGIC CONTROL
÷
4
†
500Ω
TEST
V-
† THREE INVERTERS
INTERNAL
DIGITAL
GROUND
37
V
= 1V
ONE INVERTER SHOWN FOR CLARITY
TH
26
40
39
38
OSC 1
OSC 3
OSC 2
FIGURE 7. ICL7106 DIGITAL SECTION
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