Table 12.7 Communication Formats Used by SCI
SMR Settings
Communication Format
Multi-
Stop
Bit 7: Bit 6: Bit 2: Bit 5: Bit 3:
Data
processor Parity
Bit
C/A
CHR MP
PE
STOP Mode
Length Bit
Bit
Length
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
—
Asynchronous
mode
8 bits
None
None
1 bit
2 bits
1
Present 1 bit
2 bits
1
0
7 bits
None
1 bit
2 bits
1
Present 1 bit
2 bits
0
1
—
Asynchronous
mode (multi-
processor format)
8 bits
7 bits
8 bits
Present
None
None
1 bit
2 bits
1 bit
1
2 bits
None
1
—
—
—
Synchronous
mode
Table 12.8 SCI Clock Source Selection
SMR
SCR
Serial Transmit/Receive Clock
Clock Source SCK Pin Function
Bit 7:
C/A
Bit 1: Bit 0:
CKE1 CKE0 Mode
0
0
1
0
1
0
1
0
1
0
1
0
1
Async
Sync
Internal
External
Internal
External
Input/output port (not used by SCI)
Serial clock output at bit rate
Serial clock input at 16 × bit rate
1
Serial clock output
Serial clock input
259
HITACHI [ HITACHI SEMICONDUCTOR ]
