11.2.2 Timer Control/Status Register (TCSR) ................................................................ 224
11.2.3 System Control Register (SYSCR)....................................................................... 226
11.2.4 Register Access..................................................................................................... 226
11.3 Operation............................................................................................................................ 227
11.3.1 Watchdog Timer Mode......................................................................................... 227
11.3.2 Interval Timer Mode............................................................................................. 228
11.3.3 Setting the Overflow Flag..................................................................................... 228
11.3.4 RESO Signal Output Timing................................................................................ 229
11.4 Application Notes .............................................................................................................. 230
11.4.1 Contention between TCNT Write and Increment................................................. 230
11.4.2 Changing the Clock Select Bits (CKS2 to CKS0)................................................ 230
11.4.3 Recovery from Software Standby Mode .............................................................. 230
11.4.4 Switching between Watchdog Timer Mode and Interval Timer Mode................ 231
11.4.5 System Reset by RESO Signal ............................................................................. 231
11.4.6 Detection of Program Runaway............................................................................ 231
Section 12 Serial Communication Interface................................................................. 233
12.1 Overview............................................................................................................................ 233
12.1.1 Features................................................................................................................. 233
12.1.2 Block Diagram...................................................................................................... 234
12.1.3 Input and Output Pins ........................................................................................... 235
12.1.4 Register Configuration.......................................................................................... 236
12.2 Register Descriptions ......................................................................................................... 237
12.2.1 Receive Shift Register (RSR) ............................................................................... 237
12.2.2 Receive Data Register (RDR)............................................................................... 237
12.2.3 Transmit Shift Register (TSR).............................................................................. 237
12.2.4 Transmit Data Register (TDR).............................................................................. 238
12.2.5 Serial Mode Register (SMR) ................................................................................ 238
12.2.6 Serial Control Register (SCR) .............................................................................. 240
12.2.7 Serial Status Register (SSR) ................................................................................. 243
12.2.8 Bit Rate Register (BRR) ....................................................................................... 246
12.2.9 Serial/Timer Control Register (STCR)................................................................. 257
12.3 Operation............................................................................................................................ 258
12.3.1 Overview............................................................................................................... 258
12.3.2 Asynchronous Mode............................................................................................. 260
12.3.3 Synchronous Mode ............................................................................................... 273
12.4 Interrupts............................................................................................................................ 279
12.5 Application Notes .............................................................................................................. 279
Section 13 I2C Bus Interface [Option] ........................................................................... 283
13.1 Overview............................................................................................................................ 283
13.1.1 Features................................................................................................................. 283
13.1.2 Block Diagram...................................................................................................... 285
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HITACHI [ HITACHI SEMICONDUCTOR ]
