Section 3 MCU Operating Modes and Address Space........................................... 57
3.1 Overview............................................................................................................................ 57
3.1.1 Mode Selection ..................................................................................................... 57
3.1.2 Mode and System Control Registers .................................................................... 57
3.2 System Control Register (SYSCR).................................................................................... 58
3.3 Mode Control Register (MDCR) ....................................................................................... 60
3.4 Address Space Map in Each Operating Mode ................................................................... 61
Section 4 Exception Handling........................................................................................ 65
4.1 Overview............................................................................................................................ 65
4.2 Reset................................................................................................................................... 65
4.2.1 Overview............................................................................................................... 65
4.2.2 Reset Sequence ..................................................................................................... 65
4.2.3 Disabling of Interrupts after Reset........................................................................ 68
4.3 Interrupts............................................................................................................................ 68
4.3.1 Overview............................................................................................................... 68
4.3.2 Interrupt-Related Registers................................................................................... 70
4.3.3 External Interrupts ................................................................................................ 74
4.3.4 Internal Interrupts.................................................................................................. 74
4.3.5 Interrupt Handling ................................................................................................ 75
4.3.6 Interrupt Response Time....................................................................................... 80
4.3.7 Precaution ............................................................................................................. 81
4.4 Note on Stack Handling ..................................................................................................... 82
Section 5 Wait-State Controller..................................................................................... 83
5.1 Overview............................................................................................................................ 83
5.1.1 Features................................................................................................................. 83
5.1.2 Block Diagram...................................................................................................... 83
5.1.3 Input/Output Pins.................................................................................................. 84
5.1.4 Register Configuration.......................................................................................... 84
5.2 Register Description........................................................................................................... 84
5.2.1 Wait-State Control Register (WSCR)................................................................... 84
5.3 Wait Modes........................................................................................................................ 86
Section 6 Clock Pulse Generator................................................................................... 89
6.1 Overview............................................................................................................................ 89
6.1.1 Block Diagram...................................................................................................... 89
6.1.2 Wait-State Control Register (WSCR)................................................................... 90
6.2 Oscillator Circuit................................................................................................................ 91
6.2.1 Oscillator (Generic Device).................................................................................. 91
6.2.2 Oscillator Circuit (H8/3437S)............................................................................... 95
6.3 Duty Adjustment Circuit.................................................................................................... 99
6.4 Prescaler............................................................................................................................. 99
ii
HITACHI [ HITACHI SEMICONDUCTOR ]
