HM628512 Series
Write Cycle
HM628512
-5
-7A
-7
Min
70
60
0
Parameter
Symbol Min
Max Min
Max
—
—
—
—
—
—
20
—
—
—
20
Max Unit
Notes
Write cycle time
tWC
tCW
tAS
55
50
0
—
—
—
—
—
—
20
—
—
—
20
55
50
0
—
—
—
—
—
—
25
—
—
—
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip selection to end of write
Address setup time
2
3
Address valid to end of write
Write pulse width
tAW
tWP
tWR
tWHZ
tDW
tDH
50
40
5
50
40
5
60
50
5
1, 8
4
Write recovery time
WE to output in high-Z
Data to write time overlap
Data hold from write time
0
0
0
5, 6, 7
25
0
25
0
30
0
Output active from output in high-Z tOW
Output disable to output in high-Z tOHZ
5
5
5
6
0
0
0
5, 6
Notes: 1. A write occurs during the overlap (tWP) of a low CS and a low WE. A write begins at the later
transition of CS going low or WE going low. A write ends at the earlier transition of CS going high
or WE going high. tWP is measured from the beginning of write to the end of write.
2. tCW is measured from CS going low to the end of write.
3. tAS is measured from the address valid to the beginning of write.
4. tWR is measured from the earlier of WE or CS going high to the end of write cycle.
5. During this period, I/O pins are in the output state so that the input signals of the opposite phase to
the outputs must not be applied.
6. This parameter is sampled and not 100% tested.
7. tWHZ is defined as the time at which the outputs acheive the open circuit conditons and is not
referred to output voltage levels.
8. In the write cycle with OE low fixed, tWP must satisfy the following equation to avoid a problem of
data bus contention. tWP ≥ tDW min + tWHZ max
9
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