HM628512 Series
Low VCC Data Retention Characteristics (Ta = 0 to +70°C)
This characteristics is guaranteed only for L/L-SL version.
Parameter
Symbol Min
Typ Max
Unit
V
Test Conditions*3
VCC for data retention
Data retention current
VDR
2
—
1*4
1*4
—
—
—
CS ≥ VCC – 0.2 V, Vin ≥ 0 V
VCC = 3.0 V, Vin ≥ 0 V
CS ≥ VCC – 0.2 V
ICCDR
—
—
0
50*1
15*2
—
µA
µA
ns
Chip deselect to data retention time tCDR
Operation recovery time tR
See retention waveform
5
—
ms
Notes: 1. For L-version and 20 µA (max.) at Ta = 0 to 40°C.
2. For SL-version and 3 µA (max.) at Ta = 0 to 40°C.
3. CS controls address buffer, WE buffer, OE buffer, and Din buffer. In data retention mode, Vin
levels (address, WE, OE, I/O) can be in the high impedance state.
4. Typical values are at VCC = 3.0 V, Ta = 25°C and specified loading, and not guaranteed.
Low VCC Data Retention Timing Waveform (CS Controlled)
Data retention mode
tR
tCDR
VCC
4.5 V
2.4 V
VDR
CS
0 V
≥
CS VCC – 0.2 V
12
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