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ATM12864D 参数 Datasheet PDF下载

ATM12864D图片预览
型号: ATM12864D
PDF下载: 下载PDF文件 查看货源
内容描述: [Liquid Crystal Display Module]
分类和应用:
文件页数/大小: 21 页 / 146 K
品牌: HB [ HB ELECTRONIC COMPONENTS ]
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64CH Segment Driver For Dot Matrix LCD 20  
3. Set Page (X Address)  
X address (AC0~AC2) of the display data RAM is set in the X address register.  
Writing or reading to or from MPU is executed in this specified page until the next page is set.  
RS  
0
R/W  
0
DB7  
1
DB6  
0
DB5  
1
DB4  
1
DB3  
1
DB2  
AC2  
DB1  
AC1  
DB0  
AC0  
4. Display Start Line (Z Address)  
Z address (AC0~AC5) of the display data RAM is set in the display start line register and  
displayed at the top of the screen.  
When the display duty cycle is 1/64 or others (1/32~1/64), the data of total line number of  
LCD screen, from the line specified by display start line instruction, is displayed.  
RS  
0
R/W  
0
DB7  
1
DB6  
1
DB5  
AC5  
DB4  
AC4  
DB3  
AC3  
DB2  
AC2  
DB1  
AC1  
DB0  
AC0  
5. Status Read  
RS  
1
R/W  
0
DB7  
BUSY  
DB6  
0
DB5  
ON/OFF  
DB4  
RESET  
DB3  
0
DB2  
0
DB1  
0
DB0  
0
l
BUSY  
When BUSY is 1, the Chip is executing internal operation and no instructions are  
accepted.  
When BUSY is 0, the Chip is ready to accept any instructions.  
l
l
ON/OFF  
When ON/OFF is 1, the display is on.  
When ON/OFF is 0, the display is off.  
RESET  
When RESET is 1, the system is being initialized.  
In this condition, no instructions except status read can be accepted.  
When RESET is 0, initializing has finished and the system is in the usual operation  
condition.  
6. Write Display Data  
Writes data (D0~D7) into the display data RAM.  
After writing instruction, Y address is increased by 1 automatically.  
RS  
1
R/W  
0
DB7  
D7  
DB6  
D6  
DB5  
D5  
DB4  
D4  
DB3  
D3  
DB2  
D2  
DB1  
D1  
DB0  
D0  
7. Read Display Data  
Reads data (D0~D7) from the display data RAM.  
After reading instruction, Y address is increased by 1 automatically.  
RS  
1
R/W  
1
DB7  
D7  
DB6  
D6  
DB5  
D5  
DB4  
D4  
DB3  
D3  
DB2  
D2  
DB1  
D1  
DB0  
D0  
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