82C55A
Timing Waveforms (Continued)
tWOB (21)
WR
tAOB (22)
OBF
tWIT
(28)
INTR
ACK
tAK (15)
tAIT (27)
OUTPUT
tWB (12)
FIGURE 28. MODE 1 (STROBED OUTPUT)
DATA FROM
CPU TO 82C55A
WR
(NOTE)
tAOB
(22)
OBF
INTR
ACK
tWOB
(21)
tAK
(15)
tST
(16)
STB
IBF
(NOTE)
tSIB
(23)
tAD (19)
tKD
(20)
tPS (17)
PERIPHERAL
BUS
tRIB (24)
tPH (18)
RD
DATA FROM
PERIPHERAL TO 82C55A
DATA FROM
82C55A TO PERIPHERAL
DATA FROM
82C55A TO CPU
FIGURE 29. MODE 2 (BI-DIRECTIONAL)
NOTE: Any sequence where WR occurs before ACK and STB occurs before RD is permissible. (INTR = IBF • MASK • STB • RD • OBF •
MASK • ACK • WR)
20
HARRIS [ HARRIS CORPORATION ]
