82C55A
Pin Description
SYMBOL
V
CC
GND
D0-D7
RESET
CS
RD
WR
A0-A1
PIN
NUMBER
26
7
27-34
35
6
5
36
8, 9
I/O
I
I
I
I
I
TYPE
DESCRIPTION
V
CC
: The +5V power supply pin. A 0.1µF capacitor between pins 26 and 7 is
recommended for decoupling.
GROUND
DATA BUS: The Data Bus lines are bidirectional three-state pins connected to the
system data bus.
RESET: A high on this input clears the control register and all ports (A, B, C) are set
to the input mode with the “Bus Hold” circuitry turned on.
CHIP SELECT: Chip select is an active low input used to enable the 82C55A onto the
Data Bus for CPU communications.
READ: Read is an active low input control signal used by the CPU to read status
information or data via the data bus.
WRITE: Write is an active low input control signal used by the CPU to load control
words and data into the 82C55A.
ADDRESS: These input signals, in conjunction with the RD and WR inputs, control
the selection of one of the three ports or the control word register. A0 and A1 are
normally connected to the least significant bits of the Address Bus A0, A1.
PORT A: 8-bit input and output port. Both bus hold high and bus hold low circuitry are
present on this port.
PORT B: 8-bit input and output port. Bus hold high circuitry is present on this port.
PORT C: 8-bit input and output port. Bus hold circuitry is present on this port.
PA0-PA7
PB0-PB7
PC0-PC7
1-4, 37-40
18-25
10-17
I/O
I/O
I/O
Functional Diagram
POWER
SUPPLIES
+5V
GND
GROUP A
CONTROL
GROUP A
PORT A
(8)
I/O
PA7-PA0
BI-DIRECTIONAL
DATA BUS
D7-D0
DATA BUS
BUFFER
8-BIT
INTERNAL
DATA BUS
GROUP A
PORT C
UPPER
(4)
GROUP B
PORT C
LOWER
(4)
I/O
PC7-PC4
I/O
PC3-PC0
RD
WR
A1
A0
RESET
READ
WRITE
CONTROL
LOGIC
GROUP B
CONTROL
GROUP B
PORT B
(8)
I/O
PB7-PB0
CS
2
HARRIS [ HARRIS CORPORATION ]
