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CP82C55A 参数 Datasheet PDF下载

CP82C55A图片预览
型号: CP82C55A
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS可编程外设接口 [CMOS Programmable Peripheral Interface]
分类和应用: 外围集成电路光电二极管
文件页数/大小: 26 页 / 236 K
品牌: HARRIS [ HARRIS CORPORATION ]
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82C55A
Ports A, B, and C
The 82C55A contains three 8-bit ports (A, B, and C). All can
be configured to a wide variety of functional characteristics
by the system software but each has its own special features
or “personality” to further enhance the power and flexibility of
the 82C55A.
Port A
One 8-bit data output latch/buffer and one 8-bit data
input latch. Both “pull-up” and “pull-down” bus-hold devices
are present on Port A. See Figure 2A.
Port B
One 8-bit data input/output latch/buffer and one 8-bit
data input buffer. See Figure 2B.
Port C
One 8-bit data output latch/buffer and one 8-bit data
input buffer (no latch for input). This port can be divided into
two 4-bit ports under the mode control. Each 4-bit port con-
tains a 4-bit latch and it can be used for the control signal
output and status signal inputs in conjunction with ports A
and B. See Figure 2B.
INPUT MODE
MASTER
RESET
OR MODE
CHANGE
INTERNAL
DATA IN
INTERNAL
DATA OUT
(LATCHED)
OUTPUT MODE
EXTERNAL
PORT A PIN
MODE 1
RD, WR
D7-D0
82C55A
MODE 0
C
B
8
I/O
4
I/O
4
I/O
A
8
I/O
A0-A1
CS
register will contain 9Bh. During the execution of the system
program, any of the other modes may be selected using a
single output instruction. This allows a single 82C55A to
service a variety of peripheral devices with a simple software
maintenance routine. Any port programmed as an output
port is initialized to all zeros when the control word is written.
ADDRESS BUS
CONTROL BUS
DATA BUS
PB7-PB0
PC3-PC0
C
PC7-PC4
PA7-PA0
B
8
I/O
CONTROL CONTROL
OR I/O
OR I/O
C
I/O
A
8
I/O
PB7-PB0
MODE 2
PA7-PA0
B
8
A
BI-
DIRECTIONAL
FIGURE 2A. PORT A BUS-HOLD CONFIGURATION
RESET
OR MODE
CHANGE
V
CC
P
PB7-PB0
CONTROL
PA7-PA0
FIGURE 3. BASIC MODE DEFINITIONS AND BUS INTERFACE
CONTROL WORD
INTERNAL
DATA IN
INTERNAL
DATA OUT
(LATCHED)
OUTPUT MODE
EXTERNAL
PORT B, C
PIN
D7 D6 D5 D4 D3 D2 D1 D0
GROUP B
PORT C (LOWER)
1 = INPUT
0 = OUTPUT
PORT B
1 = INPUT
0 = OUTPUT
MODE SELECTION
0 = MODE 0
1 = MODE 1
GROUP A
PORT C (UPPER)
1 = INPUT
0 = OUTPUT
PORT A
1 = INPUT
0 = OUTPUT
MODE SELECTION
00 = MODE 0
01 = MODE 1
1X = MODE 2
MODE SET FLAG
1 = ACTIVE
FIGURE 2B. PORT B AND C BUS-HOLD CONFIGURATION
FIGURE 2. BUS-HOLD CONFIGURATION
Operational Description
Mode Selection
There are three basic modes of operation than can be
selected by the system software:
Mode 0 - Basic Input/Output
Mode 1 - Strobed Input/Output
Mode 2 - Bi-directional Bus
When the reset input goes “high”, all ports will be set to the
input mode with all 24 port lines held at a logic “one” level by
internal bus hold devices. After the reset is removed, the
82C55A can remain in the input mode with no additional ini-
tialization required. This eliminates the need to pullup or pull-
down resistors in all-CMOS designs. The control word
FIGURE 4. MODE DEFINITION FORMAT
4