CD74HC4094, CD74HCT4094
Functional Diagram
2
DATA
CP
3
8-STAGE
SHIFT
REGISTER
9
QS
1
10
QS
2
1
STROBE
8-BIT
STORAGE
REGISTER
4
5
6
7
15
OE
THREE-
STATE
OUTPUT
14
13
12
11
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
GND = 8
V
CC
= 16
TRUTH TABLE
INPUTS
CP
↑
↓
↑
↑
↑
↓
NOTES:
3. H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, NC = No charge, Z = High Impedance Off-state,
↑
= Transition from Low to High Level,
↓
= Transition from High to Low.
4. At the positive clock edge the information in the seventh register stage is transferred to the 8th register stage and QS
1
output.
OE
L
L
H
H
H
H
STR
X
X
L
H
H
H
D
X
X
X
L
H
H
PARALLEL OUTPUTS
Q
0
Z
Z
NC
L
H
NC
Q
n
Z
Z
NC
Q
n
-1
Q
n
-1
NC
SERIAL OUTPUTS
QS
1
(NOTE 4)
Q’6
NC
Q’6
Q’6
Q’6
NC
QS
2
NC
Q
7
NC
NC
NC
Q
7
2