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CMOS 4 x 4 Crosspoint
February 1999
CD22100
Switch with Control Memory
High-Voltage Type (20V Rating)
Features
• Low ON Resistance . . . . . . . . . .75Ω (Typ) at V
DD
= 12V
• “Built-In” Control Latches
• Large Analog Signal Capability
. . . . . . . . . . . . . . . ±V
DD
/2
• 10MHz Switch Bandwidth
• Matched Switch Characteristics
∆R
ON
= 18Ω (Typ) at
V
DD
= 12V
• High Linearity - 0.5% Distortion (Typ) at f = 1kHz,
V
IN
= 5V
P-P
, V
DD
= 10V, and R
L
= 1kΩ
• Standard CMOS Noise Immunity
• 100% Tested for Maximum Quiescent Current at 20V
Description
CD22100 combines a 4 x 4 array of crosspoints (transmis-
sion gates) with a 4-line to 16-line decoder and 16 latch
circuits. Any one of the sixteen transmission gates (cross-
points) can be selected by applying the appropriate four line
address. The selected transmission gate can be turned on or
off by applying a logic one or zero, respectively, to the data
input and strobing the strobe input to a logic one. Any
number of the transmission gates can be ON simultaneously.
When the required operating power is applied to the
CD22100, the states of the 16 switches are indeterminate.
Therefore, all switches must be turned off by putting the
strobe high and data in low, and then addressing all switches
in succession.
[ /Title
(CD22
100)
/Sub-
ject
(CMO
S4x4
Cross-
point
Switch
with
Con-
trol
Mem-
ory
High-
Volt-
age
Type
(20V
Rat-
ing))
/
Author
()
/Key-
words
(Har-
ris
Semi-
con-
ductor,
Tele-
com,
SLICs,
SLACs
, Tele-
phone,
Ordering Information
PART
NUMBER
CD22100E
CD22100F
TEMP. RANGE
(
o
C)
-40 to 85
-55 to 125
PACKAGE
16 Ld PDIP
16 Ld CERDIP
PKG. NO.
E16.3
F16.3
Pinout
CD22100
(PDIP, CERDIP)
TOP VIEW
1
2
3
4
5
6
7
8
16 V
DD
Functional Diagram
STROBE
7
DATA
IN
2
0
1
2
3
15
Y1
X2
DATA IN
C
D
B
A
STROBE
V
SS
4-LINE TO 16-LINE DECODER
15 Y1
14 Y2
13 X4
ADDRESS
12 X3
11 Y4
10 Y3
9 X1
6
A
16 CONTROL LATCHES
4
5
6
7
14
Y2
5
B
10
8
9
10
11
Y3
3
C
12
13
14
15
11
Y4
4
D
9
X1
1
X2
12
X3
13
X4
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1999
File Number
1076.4
4-184