ISSUED DATE :2006/06/14
REVISED DATE :
GTM
CORPORATION
AC Characteristics Applicable over recommended operating range from: T
CC=+1.8 ~ 5.5V, C
Parameter
A=-40 ~ +85к,
V
L=1 TTL Gate & 100pF (unless otherwise noted)
Symbol
Test Condition
CC=1.8V
CC=2.7 ~ 5.5V
Min
TYP
Max
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
100
400
Clock Frequency, SCL
f
SCL
LOW
HIGH
-
-
KHz
CC=1.8V
CC=2.7 ~ 5.5V
CC=1.8V
4.7
1.2
4.0
0.6
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time (1)
Clock Low to Data Out Valid
t
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ꢀs
ꢀs
ns
ꢀs
ꢀs
ꢀs
ꢀs
ꢀs
ns
ꢀs
ns
ꢀs
ns
ms
t
CC=2.7 ~ 5.5V
CC=1.8V
CC=2.7 ~ 5.5V
CC=1.8V
CC=2.7 ~ 5.5V
CC=1.8V
CC=2.7 ~ 5.5V
CC=1.8V
CC=2.7 ~ 5.5V
CC=1.8V
100
50
4.5
0.9
t
I
-
0.1
0.1
4.7
1.2
4.0
0.6
4.7
0.6
0
t
AA
BUF
HD.STA
SU.STA
HD.DAT
US.DAT
Time the bus must be free before
a new transmission can start (1)
t
-
-
-
-
-
Start Hold Time
t
Start Setup Time
Data in Hold Time
Data in Setup Time
Input Rise Time (1)
Input Fall Time (1)
Stop Setup Time
Data Out Hold Time
Write Cycle Time
5.0V, 25к, Byte Mode
t
CC=2.7 ~ 5.5V
CC=1.8V
t
0
200
100
CC=2.7 ~ 5.5V
CC=1.8V
CC=2.7 ~ 5.5V
t
CC=1.8V
CC=2.7 ~ 5.5V
CC=1.8V
1.0
0.3
300
300
t
R
-
-
t
F
CC=2.7 ~ 5.5V
CC=1.8V
CC=2.7 ~ 5.5V
CC=1.8V
4.7
0.6
100
50
t
SU.STO
DH
WR
-
-
t
CC=2.7 ~ 5.5V
CC=1.8V
CC=2.7 ~ 5.5V
CC=1.8V
5
5
t
-
1M
1M
Write
Cycles
Endurance
-
(1)
CC=2.7 ~ 5.5V
Note: 1. This parameter is characterized and not 100% tested.
Device Operation
Clock and Data Transitions: Transitions on the SDA pin should only occur when SCL is low (refer to the Data
Validity timing diagram in Figure 5). If the SDA pin changes when SCL is high, then the transition will be
interpreted as a START or STOP condition.
START Condition: A START condition occurs when the SDA transitions form high to low when SCL is high.
The START signal is usually used to initiate a command (refer to the Start and Stop Definition timing diagram in
Figure 6).
STOP Condition: A STOP condition occurs when the SDA transitions form low to high when SCL is high (refer
to Figure 6. START and STOP Definition timing diagram). The STOP command will put the device into standby
mode after no acknowledgment is issued during the read sequence.
Acknowledge: An acknowledgement is sent by pulling the SDA low to confirm that a word has been
successfully received. All addresses and data words are serially transmitted to and from the EEPROM in 8-bit
words, so acknowledgments are usually issued during the 9th clock cycle.
Standby Mode: Standby mode is entered when the chip is initially powered-on or after a STOP command has
been issued and any internal operations have been completed. .
Memory Reset: In the event of unexpected power or connection loss, a START condition can be issued to
restart the input command sequence. If the device is currently in write cycle mode, this command will be
ignored.
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