GS88118A(T/D)/GS88132A(D)/GS88136A(T/D)
TQFP Pin Description
Symbol
A0, A1
An
Type
Description
Address field LSBs and Address Counter preset Inputs
Address Inputs
I
I
DQA
DQB
DQC
DQD
I/O
Data Input and Output pins
NC
—
No Connect
Byte Write—Writes all enabled bytes; active low
Byte Write Enable for DQA, DQB Data I/Os; active low
Clock Input Signal; active high
BW
I
I
BA, BB, BC, BD
CK
GW
I
I
Global Write Enable—Writes all bytes; active low
Chip Enable; active low
E1
I
E2
I
Chip Enable; active high
G
I
Output Enable; active low
ADV
ADSP, ADSC
ZZ
I
Burst address counter advance enable; active low
Address Strobe (Processor, Cache Controller); active low
Sleep Mode control; active high
Scan Test Mode Select
I
I
TMS
TDI
I
I
Scan Test Data In
TDO
TCK
FT
O
I
Scan Test Data Out
Scan Test Clock
I
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Core power supply
LBO
I
V
I
DD
V
I
I
I/O and Core Ground
SS
V
Output driver power supply
DDQ
Rev: 1.04 3/2005
4/36
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.