GS73024AB
Read Cycle 2: WE = V
IH
t
RC
Address
t
AA
CE
t
AC
t
LZ
OE
t
OLZ
High impedance
t
OE
Data valid
t
HZ
t
OHZ
Data Out
Write Cycle
Parameter
Write cycle time
Address valid to end of write
Chip enable to end of write (CE)
Data set up time
Data hold time
Write pulse width
Address set up time
Write recovery time (WE)
Write recovery time ( CE )
Output Low Z from end of write
Write to output in High Z
* These parameters are sampled and are not 100% tested
Symbol
t
WC
t
AW
t
CW
t
DW
t
DH
t
WP
t
AS
t
WR
t
WR1
t
WLZ*
t
WHZ*
-8
Min
8
5.5
5.5
4
0
5.5
0
0
0
2
—
-10
Max
—
—
—
—
—
—
—
—
—
—
4
-12
Max
—
—
—
—
—
—
—
—
—
—
5
Min
10
7
7
5
0
7
0
0
0
3
—
Min
12
8
8
6
0
8
0
0
0
3
—
Max
—
—
—
—
—
—
—
—
—
—
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev: 1.03 12/2005
7/12
© 2003, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GSI [ GSI TECHNOLOGY ]
