GS72116ATP/J/T/U
Write Cycle 1: WE control
tWC
Address
tAW
tWR
OE
CE
tCW
tBW
UB, LB
WE
tAS
tWP
tDW
tDH
Data valid
Data In
tWHZ
tWLZ
High impedance
Data Out
Write Cycle 2: CE control
tWC
Address
OE
tAW
tWR1
tAS
tCW
tBW
CE
UB, LB
WE
tWP
tDW
tDH
Data valid
Data In
Data Out
High impedance
Rev: 1.04a 10/2002
9/18
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.