GS72108TP/J
Write Cycle 1: WE control
t
WC
Address
t
AW
OE
t
CW
CE
t
AS
WE
t
DW
Data In
t
WHZ
Data Out
H
IGH IMPEDANCE
D
ATA VALID
t
WR
t
WP
t
DH
t
WLZ
Write Cycle 2: CE control
t
WC
Address
t
AW
OE
t
AS
CE
t
WP
WE
t
DW
Data In
Data Out
D
ATA VALID
t
WR1
t
CW
t
DH
H
IGH IMPEDANCE
Rev: 1.08 7/2002
8/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.