GS72116ATP/J/T/U
Write Cycle 1: WE control
tWC
Address
tAW
OE
tCW
CE
tBW
UB, LB
tAS
WE
tDW
Data In
tWHZ
Data Out
tDH
Data valid
tWLZ
High impedance
tWP
tWR
Write Cycle 2: CE control
tWC
Address
tAW
OE
tAS
CE
tBW
UB, LB
tWP
WE
tDW
Data In
Data Out
tDH
Data valid
tCW
tWR1
High impedance
Rev: 1.02 10/2001
9/17
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.