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GS72116AGP-10I 参数 Datasheet PDF下载

GS72116AGP-10I图片预览
型号: GS72116AGP-10I
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 128KX16, 10ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, TSOP2-44]
分类和应用: 静态存储器光电二极管内存集成电路
文件页数/大小: 13 页 / 171 K
品牌: GSI [ GSI TECHNOLOGY ]
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GS72116AGP/U
AC Characteristics
Read Cycle
Parameter
Read cycle time
Address access time
Chip enable access time (CE)
Byte enable access time (UB, LB)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Byte enable to output in low Z (UB, LB)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
Byte disable to output in High Z (UB, LB)
Symbol
t
RC
t
AA
t
AC
t
AB
t
OE
t
OH
t
LZ
*
t
OLZ
*
t
BLZ
*
t
HZ
*
t
OHZ
*
t
BHZ
*
-7
Min
7
3
3
0
0
Max
7
7
3
3
3.5
3
3
Min
8
3
3
0
0
-8
Max
8
8
3.5
3.5
4
3.5
3.5
Min
10
3
3
0
0
-10
Max
10
10
4
4
5
4
4
Min
12
3
3
0
0
-12
Max
12
12
5
5
6
5
5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
* These parameters are sampled and are not 100% tested.
Read Cycle 1: CE = OE = V
IL
, WE = V
IH
, UB and, or LB = V
IL
t
RC
Address
t
AA
t
OH
Data Out
Previous Data
Data valid
Rev: 1.11 1/2013
6/13
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.