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GS71108AGU-10I 参数 Datasheet PDF下载

GS71108AGU-10I图片预览
型号: GS71108AGU-10I
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 128KX8, 10ns, CMOS, PBGA48, 6 X 8 MM, ROHS COMPLIANT, 0.75 MM PITCH, FBGA-48]
分类和应用: 静态存储器内存集成电路
文件页数/大小: 11 页 / 419 K
品牌: GSI [ GSI TECHNOLOGY ]
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GS71108AU
Write Cycle
Parameter
Write cycle time
Address valid to end of write
Chip enable to end of write
Data set up time
Data hold time
Write pulse width
Address set up time
Write recovery time (WE)
Write recovery time (CE)
Output Low Z from end of write
Write to output in High Z
Symbol
tWC
tAW
tCW
tDW
tDH
tWP
tAS
tWR
tWR1
tWLZ
*
tWHZ
*
-7
Min
7
5
5
3
0
5
0
0
0
3
Max
3
Min
8
5.5
5.5
4
0
5.5
0
0
0
3
-8
Max
3.5
Min
10
7
7
5
0
7
0
0
0
3
-10
Max
4
Min
12
8
8
6
0
8
0
0
0
3
-12
Max
5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
* These parameters are sampled and are not 100% tested
Write Cycle 1: WE control
t
WC
Address
t
AW
OE
t
CW
CE
t
AS
WE
t
DW
Data In
t
WHZ
Data Out
H
IGH IMPEDANCE
D
ATA VALID
t
WR
t
WP
t
DH
t
WLZ
Rev: 1.10a 3/2011
7/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.