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GS4576S09L-24 参数 Datasheet PDF下载

GS4576S09L-24图片预览
型号: GS4576S09L-24
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 64MX9, CMOS, PBGA144, UBGA-144]
分类和应用: 动态存储器双倍数据速率内存集成电路
文件页数/大小: 63 页 / 2207 K
品牌: GSI [ GSI TECHNOLOGY ]
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GS4576S09/18L  
On–Die Termination (ODT)  
Mode Register Bit 9 (M9) set to 1 during an MRS command enables ODT. With ODT on, the Ds, Qs, and DM are terminated to  
VTT with a resistance, RTT. Command, address, QVLD, and clock signals are not terminated. The diagram below shows the  
equivalent circuit of a D receiver with ODT. When a Q begins to drive after a Read command is issued, the ODT function is briefly  
switched off. When a Q stops driving at the end of a data transfer, ODT is switched back on. D and DM pins are always terminated.  
On–Die Termination DC Parameters  
Description  
Symbol  
Min  
Max  
Units  
V
Notes  
1, 2  
3
V
0.95 * V  
1.05 * V  
REF  
Termination Voltage  
On–Die Termination  
TT  
REF  
R
125  
185  
TT  
Notes:  
1. All voltages referenced to V (GND).  
SS  
2.  
V
is expected to be set equal to V  
and must track variations in the DC level of V  
.
REF  
TT  
REF  
3. The R value is measured at 95°C T .  
TT  
C
On–Die Termination–Equivalent Circuit  
VTT  
SW  
RTT  
Receiver  
D
VREF  
Rev: 1.03 11/2013  
10/63  
© 2011, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.