GS4576C09/18/36L
On–Die Termination (ODT)
Mode Register Bit 9 (M9) set to 1 during an MRS command enables ODT. With ODT on, the DQs and DM are terminated to VTT
with a resistance, RTT. Command, address, QVLD, and clock signals are not terminated. The diagram below shows the equivalent
circuit of a DQ receiver with ODT. When a tri-stated DQ begins to drive, the ODT function is briefly switched off. When a DQ
stops driving at the end of a data transfer, ODT is switched back on. Two-state DM pin never deactivates ODT.
On–Die Termination DC Parameters
Description
Symbol
Min
Max
Units
V
Notes
1, 2
3
V
0.95 * V
1.05 * V
REF
Termination Voltage
On–Die Termination
TT
REF
R
125
185
TT
Notes:
1. All voltages referenced to V (GND).
SS
2.
V
is expected to be set equal to V
and must track variations in the DC level of V
.
REF
TT
REF
3. The R value is measured at 95°C T .
TT
C
On–Die Termination–Equivalent Circuit
VTT
SW
RTT
Receiver
DQ
VREF
Rev: 1.04 11/2013
11/62
© 2011, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GSI [ GSI TECHNOLOGY ]
