Preliminary
GS4288C09/18/36L
4.
t
MRSC after the valid MRS, issues an AUTO REFRESH command to all 8 banks in any order (along with 1024 NOP
commands) prior to normal operation. As always,
t
RC must be met between any AUTO REFRESH and any subsequent
valid command to the same bank.
Notes:
1. It is possible to apply V
DDQ
before V
DD
. However, when doing this, the DQs, DM, and all other pins with an output driver, will
go High instead of tri-stating. These pins will remain High until V
DD
is at the same level as V
DDQ
. Care should be taken to
avoid bus conflicts during this period.
2.
If V
ID
(
DC
)
on CK/CK can not be met prior to being applied to the LLDRAM II, placing a large external resistor from CS to V
DD
is a viable option for ensuring the command bus does
not receive unwanted commands during this unspecified state.
Rev: 1.02 3/2013
7/62
© 2011, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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